659 lines
16 KiB
C
659 lines
16 KiB
C
/*******************************************************************************
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* *
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* Copyright 2010 Rheinmetall Canada Inc. *
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* *
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* No part of this document may be reproduced, stored in *
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* a retrieval system, or transmitted, in any form or by any means, *
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* electronic, mechanical, photocopying, recording, or otherwise, *
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* without the prior written permission of Rheinmetall Canada Inc. *
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* *
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*******************************************************************************/
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/*
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Description:
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This is a template file for standard C code file.
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*/
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/* ************************************************************************** */
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/* ¤Revision:
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000 20100616 JFM,
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Original version.
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### YYYYMMDD Initial, Bug Identification
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Change description.
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*/
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/* ************************************************************************** */
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/* Includes */
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#include "define.h"
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#include "BoardCfg.h"
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#include "InternalUart.h"
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#include "uart.h"
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#include "BootloaderProtocol.h"
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//#include <stdio.h>
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/* ************************************************************************** */
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/* Local variables */
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//char IntUartTxBuff[MAX_INTERNAL_UART_PORT][INTERNAL_UART_BUFFER_DEPTH]; //Tx Buffers
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//char acIntUartRxBuff[INTERNAL_UART_BUFFER_DEPTH]; //Rx Buffers
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stInternalUartData astInternalUartData; //port management data
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//-----------------------------------------------------------------------------
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//-----------------------------------------------------------------------------
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void InternalUartInit(void)
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{
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#ifdef USE_SERIAL_PORT_1
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//Setup port 1A
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//
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U1STA = 0;
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U1STAbits.UTXEN = 1; //enable transmitter
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IPC6bits.U1IP = 5; //priority 5 //NOT USED
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IPC6bits.U1IS = 2; //sub-priority 2 //NOT USED
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U1STAbits.UTXSEL = 0b01; //interrupt when all characters are transmitted
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IFS0bits.U1TXIF = 0; //clear interrupt flag
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IEC0bits.U1TXIE = 0; //disable tx interrupt
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U1STAbits.URXISEL = 0b00; //interrupt for each character received
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IFS0bits.U1RXIF = 0;
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IEC0bits.U1RXIE = 0; //disable rx interrupts
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U1STAbits.URXEN = 1; //enable receiver
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U1MODEbits.ON = 0; //disable module
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#endif
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#ifdef USE_SERIAL_PORT_2
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//Setup port 1B
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//
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U2STA = 0;
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U2STAbits.UTXEN = 1; //enable transmitter
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IPC8bits.U2IP = 5; //priority 5 //NOT USED
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IPC8bits.U2IS = 2; //sub-priority 2 //NOT USED
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U2STAbits.UTXSEL = 0b01; //interrupt when all characters are transmitted
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IFS1bits.U2TXIF = 0; //clear interrupt flag
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IEC1bits.U2TXIE = 0; //disable tx interrupt
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U2STAbits.URXISEL = 0b00; //interrupt for each character received
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IFS1bits.U2RXIF = 0;
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IEC1bits.U2RXIE = 0; //disable rx interrupts
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U2STAbits.URXEN = 1; //enable receiver
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U2MODEbits.ON = 0; //disable module
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#endif
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//
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//#ifdef USE_SERIAL_PORT_1A
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// //Setup port 1A
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// //
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// U1ASTA = 0;
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// U1ASTAbits.UTXEN = 1; //enable transmitter
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// IPC6bits.U1AIP = 5; //priority 5
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// IPC6bits.U1AIS = 2; //sub-priority 2
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// U1ASTAbits.UTXSEL = 0b01; //interrupt when all characters are transmitted
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// IFS0bits.U1ATXIF = 0; //clear interrupt flag
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// IEC0bits.U1ATXIE = 0; //disable tx interrupt
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// U1ASTAbits.URXISEL = 0b00; //interrupt for each character received
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// IFS0bits.U1ARXIF = 0;
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// IEC0bits.U1ARXIE = 0; //disable rx interrupts
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// U1ASTAbits.URXEN = 1; //enable receiver
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// U1AMODEbits.ON = 0; //disable module
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//
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//#endif
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//#ifdef USE_SERIAL_PORT_1B
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// //Setup port 1B
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// //
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// U1BSTA = 0;
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// U1BSTAbits.UTXEN = 1; //enable transmitter
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// IPC12bits.U1BIP = 5; //priority 5
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// IPC12bits.U1BIS = 2; //sub-priority 2
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// U1BSTAbits.UTXSEL = 0b01; //interrupt when all characters are transmitted
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// IFS2bits.U1BTXIF = 0; //clear interrupt flag
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// IEC2bits.U1BTXIE = 0; //disable tx interrupt
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// U1BSTAbits.URXISEL = 0b00; //interrupt for each character received
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// IFS2bits.U1BRXIF = 0;
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// IEC2bits.U1BRXIE = 0; //disable rx interrupts
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// U1BSTAbits.URXEN = 1; //enable receiver
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// U1BMODEbits.ON = 0; //disable module
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//#endif
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//
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//#ifdef USE_SERIAL_PORT_2A
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// //Setup port 2A
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// //
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// U2ASTA = 0;
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// U2ASTAbits.UTXEN = 1; //enable transmitter
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// IPC7bits.U2AIP = 5; //priority 5
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// IPC7bits.U2AIS = 2; //sub-priority 2
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// U2ASTAbits.UTXSEL = 0b01; //interrupt when all characters are transmitted
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// IFS1bits.U2ATXIF = 0; //clear interrupt flag
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// IEC1bits.U2ATXIE = 0; //disable tx interrupt
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// U2ASTAbits.URXISEL = 0b00; //interrupt for each character received
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// IFS1bits.U2ARXIF = 0;
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// IEC1bits.U2ARXIE = 0; //disable rx interrupts
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// U2ASTAbits.URXEN = 1; //enable receiver
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// U2AMODEbits.ON = 0; //disable module
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//#endif
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//
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//#ifdef USE_SERIAL_PORT_2B
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//
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// //Setup port 2B
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// //
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// U2BSTA = 0;
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// U2BSTAbits.UTXEN = 1; //enable transmitter
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// IPC12bits.U2BIP = 5; //priority 5
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// IPC12bits.U2BIS = 2; //sub-priority 2
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// U2BSTAbits.UTXSEL = 0b01; //interrupt when all characters are transmitted
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// IFS2bits.U2BTXIF = 0; //clear interrupt flag
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// IEC2bits.U2BTXIE = 0; //disable tx interrupt
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// U2BSTAbits.URXISEL = 0b00; //interrupt for each character received
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// IFS2bits.U2BRXIF = 0;
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// IEC2bits.U2BRXIE = 0; //disable rx interrupts
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// U2BSTAbits.URXEN = 1; //enable receiver
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// U2BMODEbits.ON = 0; //disable module
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//#endif
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//
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//#ifdef USE_SERIAL_PORT_3A
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//
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// //Setup port 3A
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// //
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// U3ASTA = 0;
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// U3ASTAbits.UTXEN = 1; //enable transmitter
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// IPC8bits.U3AIP = 5; //priority 5
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// IPC8bits.U3AIS = 2; //sub-priority 2
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// U3ASTAbits.UTXSEL = 0b01; //interrupt when all characters are transmitted
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// IFS1bits.U3ATXIF = 0; //clear interrupt flag
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// IEC1bits.U3ATXIE = 0; //disable tx interrupt
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// U3ASTAbits.URXISEL = 0b00; //interrupt for each character received
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// IFS1bits.U3ARXIF = 0; //clear interrupt flag
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// IEC1bits.U3ARXIE = 0; //disable tx interrupt
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// U3ASTAbits.URXEN = 1; //enable receiver
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// U3AMODEbits.ON = 0; //disable module
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//#endif
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//
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//#ifdef USE_SERIAL_PORT_3B
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// //Setup port 3B
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// //
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// U3BSTA = 0;
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// U3BSTAbits.UTXEN = 1; //enable transmitter
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// IPC12bits.U3BIP = 5; //priority 5
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// IPC12bits.U3BIS = 2; //sub-priority 2
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// U3BSTAbits.UTXSEL = 0b01; //interrupt when all characters are transmitted
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// IFS2bits.U3BTXIF = 0; //clear interrupt flag
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// IEC2bits.U3BTXIE = 0; //disable tx interrupt
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// U3BSTAbits.URXISEL = 0b00; //interrupt for each character received
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// IFS2bits.U3BRXIF = 0; //clear interrupt flag
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// IEC2bits.U3BRXIE = 0; //disable rx interrupt
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// U3BSTAbits.URXEN = 1; //enable receiver
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// U3BMODEbits.ON = 0; //disable module
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//#endif
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//
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astInternalUartData.pcTxDataPtr = 0;
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astInternalUartData.pcTxCircBufferTail = 0;
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astInternalUartData.pcTxCircBufferHead = 0;
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astInternalUartData.iTxDataSize = 0;
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astInternalUartData.iTxDataCounter = 0;
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astInternalUartData.iIsBusy = 0;
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astInternalUartData.iIsOpened = 0;
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astInternalUartData.iUartHandle = 0;
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}
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/*
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//-----------------------------------------------------------------------------
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//-----------------------------------------------------------------------------
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int SetIntalUartInterrupts(int p_iUartPort, int p_iRxInterrupt,int p_iTxInterrupt)
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{
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if(p_iUartPort > MAX_INTERNAL_UART_PORT)
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return UART_INVALID_PORT;
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switch(p_iUartPort)
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{
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case INTERNAL_UART_PORT_1A:
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{
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if(p_iTxInterrupt)
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{
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IFS0bits.U1ATXIF = 0; //clear interrupt flag
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IEC0bits.U1ATXIE = 1; //enable tx interrupt
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}
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else
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{
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IEC0bits.U1ATXIE = 0; //disable tx interrupt
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U1ASTAbits.UTXEN = 1; //This bit must be set when working without interrupts
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}
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if(p_iRxInterrupt)
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{
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IFS0bits.U1ARXIF = 0;
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IEC0bits.U1ARXIE = 1; //enable rx interrupt
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}
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else
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{
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IEC0bits.U1ARXIE = 0; //disable rx interrupt
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}
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break;
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}
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case INTERNAL_UART_PORT_1B:
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{
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if(p_iTxInterrupt)
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{
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IFS2bits.U1BTXIF = 0; //clear interrupt flag
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IEC2bits.U1BTXIE = 1; //enable tx interrupt
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}
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else
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{
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IEC2bits.U1BTXIE = 0; //disable tx interrupt
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U1BSTAbits.UTXEN = 1; //This bit must be set when working without interrupts
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}
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if(p_iRxInterrupt)
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{
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IFS2bits.U1BRXIF = 0;
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IEC2bits.U1BRXIE = 1; //enable rx interrupt
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}
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else
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{
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IEC2bits.U1BRXIE = 0; //disable rx interrupt
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}
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break;
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}
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case INTERNAL_UART_PORT_2A:
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{
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if(p_iTxInterrupt)
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{
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IFS1bits.U2ATXIF = 0; //clear interrupt flag
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IEC1bits.U2ATXIE = 1; //enable tx interrupt
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}
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else
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{
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IEC1bits.U2ATXIE = 0; //disable tx interrupt
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U2ASTAbits.UTXEN = 1; //This bit must be set when working without interrupts
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}
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if(p_iRxInterrupt)
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{
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IFS1bits.U2ARXIF = 0;
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IEC1bits.U2ARXIE = 1; //enable rx interrupt
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}
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else
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{
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IEC1bits.U2ARXIE = 0; //disable rx interrupt
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}
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break;
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}
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case INTERNAL_UART_PORT_2B:
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{
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if(p_iTxInterrupt)
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{
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IFS2bits.U2BTXIF = 0; //clear interrupt flag
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IEC2bits.U2BTXIE = 1; //enable tx interrupt
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}
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else
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{
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IEC2bits.U2BTXIE = 0; //disable tx interrupt
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U2ASTAbits.UTXEN = 1; //This bit must be set when working without interrupts
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}
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if(p_iRxInterrupt)
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{
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IFS2bits.U2BRXIF = 0;
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IEC2bits.U2BRXIE = 1; //enable rx interrupt
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}
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else
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{
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IEC2bits.U2BRXIE = 0; //disable rx interrupt
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}
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break;
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}
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case INTERNAL_UART_PORT_3A:
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{
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if(p_iTxInterrupt)
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{
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IFS1bits.U3ATXIF = 0; //clear interrupt flag
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IEC1bits.U3ATXIE = 1; //enable tx interrupt
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}
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else
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{
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IEC1bits.U3ATXIE = 0; //disable tx interrupt
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U3ASTAbits.UTXEN = 1; //This bit must be set when working without interrupts
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}
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if(p_iRxInterrupt)
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{
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IFS1bits.U3ARXIF = 0; //clear interrupt flag
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IEC1bits.U3ARXIE = 1; //enable tx interrupt
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}
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else
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{
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IEC1bits.U3ARXIE = 0; //disable rx interrupt
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}
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break;
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}
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case INTERNAL_UART_PORT_3B:
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{
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if(p_iTxInterrupt)
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{
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IFS2bits.U3BTXIF = 0; //clear interrupt flag
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IEC2bits.U3BTXIE = 1; //enable tx interrupt
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}
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else
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{
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IEC2bits.U3BTXIE = 0; //disable tx interrupt
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U3BSTAbits.UTXEN = 1; //This bit must be set when working without interrupts
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}
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if(p_iRxInterrupt)
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{
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IFS2bits.U3BRXIF = 0; //clear interrupt flag
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IEC2bits.U3BRXIE = 1; //enable tx interrupt
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}
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else
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{
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IEC2bits.U3BRXIE = 0; //disable rx interrupt
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}
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break;
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}
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default:
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{
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return UART_INVALID_PORT;
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}
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}
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return UART_OK;
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} */
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//-----------------------------------------------------------------------------
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//-----------------------------------------------------------------------------
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int OpenInternalPort(char *p_pcHeadPtr, char *p_pcTailPtr, int p_iBaudRate, int p_iNbStopBits, int p_iParityEnable)
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{
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int iBRG = (PERIPHERAL_FREQ/(4*p_iBaudRate)) - 1;
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int iMask = 0;
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switch(p_iNbStopBits)
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{
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case INT_UART_ONE_STOP_BIT:
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{
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break;
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}
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case INT_UART_TWO_STOP_BITS:
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{
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iMask |= 0x00000001;
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break;
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}
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}
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// astInternalUartData.iUartHandle = p_iUartHandle;
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astInternalUartData.pcTxCircBufferTail = p_pcTailPtr;
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astInternalUartData.pcTxCircBufferHead = p_pcHeadPtr;
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switch(p_iParityEnable)
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{
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case INT_UART_NO_PARITY:
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{
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break;
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}
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case INT_UART_EVEN_PARITY:
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{
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iMask |= 0x00000002;
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break;
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}
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case INT_UART_ODD_PARITY:
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{
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iMask |= 0x00000004;
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break;
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}
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}
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#ifdef USE_SERIAL_PORT_1
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{
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U1MODE = iMask;
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U1MODEbits.BRGH = 1;
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U1BRG = iBRG;
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U1MODEbits.ON = 1; //enable module
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}
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#endif
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#ifdef USE_SERIAL_PORT_2
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{
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U2MODE = iMask;
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U2MODEbits.BRGH = 1;
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U2BRG = iBRG;
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U2MODEbits.ON = 1; //enable module
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}
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#endif
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//#ifdef USE_SERIAL_PORT_1A
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// {
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// U1AMODE = iMask;
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// U1AMODEbits.BRGH = 1;
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// U1ABRG = iBRG;
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// U1AMODEbits.ON = 1; //enable module
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// }
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//#endif
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//#ifdef USE_SERIAL_PORT_1B
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// {
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// U1BMODE = iMask;
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// U1BMODEbits.BRGH = 1;
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// U1BBRG = iBRG;
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// U1BMODEbits.ON = 1; //enable module
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// }
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//#endif
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//#ifdef USE_SERIAL_PORT_2A
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// {
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// U2AMODE = iMask;
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// U2AMODEbits.BRGH = 1;
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// U2ABRG = iBRG;
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// U2AMODEbits.ON = 1; //enable module
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// }
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//#endif
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//#ifdef USE_SERIAL_PORT_2B
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// {
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// U2BMODE = iMask;
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// U2BMODEbits.BRGH = 1;
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// U2BBRG = iBRG;
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// U2BMODEbits.ON = 1; //enable module
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// }
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//#endif
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//#ifdef USE_SERIAL_PORT_3A
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// {
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// U3AMODE = iMask;
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// U3AMODEbits.BRGH = 1;
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// U3ABRG = iBRG;
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// U3AMODEbits.ON = 1; //enable module
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// }
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//#endif
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//#ifdef USE_SERIAL_PORT_3B
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// {
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// U3BMODE = iMask;
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// U3BMODEbits.BRGH = 1;
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// U3BBRG = iBRG;
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// U3BMODEbits.ON = 1; //enable module
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// }
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//#endif
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astInternalUartData.iIsOpened = 1;
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return UART_OK;
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}
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//-----------------------------------------------------------------------------
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//-----------------------------------------------------------------------------
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int SendInternalUartData(char *p_pcDataBuf, int p_iDataSize)
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{
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int i;
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if(astInternalUartData.iIsOpened == 0)
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return UART_PORT_NOT_OPENED;
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if(astInternalUartData.iIsBusy)
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return UART_PORT_BUSY;
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astInternalUartData.pcTxDataPtr = p_pcDataBuf;
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astInternalUartData.iTxDataSize = p_iDataSize;
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astInternalUartData.iTxDataCounter = 0;
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astInternalUartData.iIsBusy = 0;
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for(i = 0; i < p_iDataSize; i++)
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{
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#ifdef USE_SERIAL_PORT_1
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U1TXREG = *p_pcDataBuf++;
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while(U1STAbits.TRMT == 0);
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#endif
|
|
#ifdef USE_SERIAL_PORT_2
|
|
U2TXREG = *p_pcDataBuf++;
|
|
while(U2STAbits.TRMT == 0);
|
|
Nop();
|
|
#endif
|
|
|
|
|
|
|
|
|
|
// #ifdef USE_SERIAL_PORT_1A
|
|
// U1ATXREG = *p_pcDataBuf++;
|
|
// while(U1ASTAbits.TRMT == 0);
|
|
// #endif
|
|
// #ifdef USE_SERIAL_PORT_1B
|
|
// U1BTXREG = *p_pcDataBuf++;
|
|
// while(U1BSTAbits.TRMT == 0);
|
|
// #endif
|
|
// #ifdef USE_SERIAL_PORT_2A
|
|
// U2ATXREG = *p_pcDataBuf++;
|
|
// while(U2ASTAbits.TRMT == 0);
|
|
// #endif
|
|
// #ifdef USE_SERIAL_PORT_2B
|
|
// U2BTXREG = *p_pcDataBuf++;
|
|
// while(U2BSTAbits.TRMT == 0);
|
|
// #endif
|
|
// #ifdef USE_SERIAL_PORT_3A
|
|
// U3ATXREG = *p_pcDataBuf++;
|
|
// while(U3ASTAbits.TRMT == 0);
|
|
// #endif
|
|
// #ifdef USE_SERIAL_PORT_3B
|
|
// U3BTXREG = *p_pcDataBuf++;
|
|
// while(U3BSTAbits.TRMT == 0);
|
|
// #endif
|
|
|
|
}
|
|
|
|
return UART_OK;
|
|
}
|
|
|
|
int ReadInternalUart(void)
|
|
{
|
|
int count = 0;
|
|
char byte;
|
|
|
|
#ifdef USE_SERIAL_PORT_1
|
|
while(U1STAbits.URXDA == 1)
|
|
{
|
|
byte = U1RXREG;
|
|
ProtocolRxData(byte);
|
|
count++;
|
|
}
|
|
#endif
|
|
#ifdef USE_SERIAL_PORT_2
|
|
while(U2STAbits.URXDA == 1)
|
|
{
|
|
byte = U2RXREG;
|
|
// ProtocolRxData(byte);
|
|
count++;
|
|
}
|
|
#endif
|
|
|
|
|
|
// #ifdef USE_SERIAL_PORT_1A
|
|
// while(U1ASTAbits.URXDA == 1)
|
|
// {
|
|
// byte = U1ARXREG;
|
|
// ProtocolRxData(byte);
|
|
// count++;
|
|
// }
|
|
// #endif
|
|
// #ifdef USE_SERIAL_PORT_1B
|
|
// while(U1BSTAbits.URXDA == 1)
|
|
// {
|
|
// byte = U1BRXREG;
|
|
// ProtocolRxData(byte);
|
|
// count++;
|
|
// }
|
|
// #endif
|
|
// #ifdef USE_SERIAL_PORT_2A
|
|
// while(U2ASTAbits.URXDA == 1)
|
|
// {
|
|
// byte = U2ARXREG;
|
|
// ProtocolRxData(byte);
|
|
// count++;
|
|
// }
|
|
// #endif
|
|
// #ifdef USE_SERIAL_PORT_2B
|
|
// while(U2BSTAbits.URXDA == 1)
|
|
// {
|
|
// byte = U2BRXREG;
|
|
// ProtocolRxData(byte);
|
|
// count++;
|
|
// }
|
|
// #endif
|
|
// #ifdef USE_SERIAL_PORT_3A
|
|
// while(U3ASTAbits.URXDA == 1)
|
|
// {
|
|
// byte = U3ARXREG;
|
|
// ProtocolRxData(byte);
|
|
// count++;
|
|
// }
|
|
// #endif
|
|
// #ifdef USE_SERIAL_PORT_3B
|
|
// while(U3BSTAbits.URXDA == 1)
|
|
// {
|
|
// byte = U3BRXREG;
|
|
// ProtocolRxData(byte);
|
|
// count++;
|
|
// }
|
|
// #endif
|
|
|
|
return count;
|
|
|
|
}
|
|
|
|
void CloseInternalUart(void)
|
|
{
|
|
#ifdef USE_SERIAL_PORT_1
|
|
U1MODEbits.ON = 0; //disable module
|
|
U1STA = 0;
|
|
#endif
|
|
#ifdef USE_SERIAL_PORT_2
|
|
U2MODEbits.ON = 0; //disable module
|
|
U2STA = 0;
|
|
#endif
|
|
|
|
|
|
|
|
// #ifdef USE_SERIAL_PORT_1A
|
|
// U1AMODEbits.ON = 0; //disable module
|
|
// U1ASTA = 0;
|
|
// #endif
|
|
// #ifdef USE_SERIAL_PORT_1B
|
|
// U1BMODEbits.ON = 0; //disable module
|
|
// U1BSTA = 0;
|
|
// #endif
|
|
// #ifdef USE_SERIAL_PORT_2A
|
|
// U2AMODEbits.ON = 0; //disable module
|
|
// U2ASTA = 0;
|
|
// #endif
|
|
// #ifdef USE_SERIAL_PORT_2B
|
|
// U2BMODEbits.ON = 0; //disable module
|
|
// U2BSTA = 0;
|
|
// #endif
|
|
// #ifdef USE_SERIAL_PORT_3A
|
|
// U3AMODEbits.ON = 0; //disable module
|
|
// U3ASTA = 0;
|
|
// #endif
|
|
// #ifdef USE_SERIAL_PORT_3B
|
|
// U3BMODEbits.ON = 0; //disable module
|
|
// U3BSTA = 0;
|
|
// #endif
|
|
}
|
|
|
|
|
|
//EOF
|
|
|