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Bootloader fonctionnel... à retravailler

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jfmartel 2021-09-24 11:33:40 -04:00
parent 0e849006be
commit c60dae77b8
52 changed files with 4929 additions and 3320 deletions
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49
Bootloader_PIC32.X/Source/BoardCfg.h Normal file
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/*
* File: BoardCfg.h
* Author: JF
*
* Created on November 26, 2018, 4:50 PM
*/
#ifndef BOARDCFG_H
#define BOARDCFG_H
#include "define.h"
static inline __attribute__((always_inline)) unsigned char SPICalculateBRG(unsigned int pb_clk, unsigned int spi_clk)
{
unsigned int brg;
brg = pb_clk / (2 * spi_clk);
if(pb_clk % (2 * spi_clk))
brg++;
if(brg > 0x100)
brg = 0x100;
if(brg)
brg--;
return (unsigned char) brg;
}
//
#ifdef FUBARINO_BRD
#include "BoardCfg_Fubarino.h"
#endif
//#ifdef PINGUINO_BRD
//#include "BoardCfg_Pinguino.h"
//#endif
#ifdef CHALETDUINO_BRD
#include "BoardCfg_Chaletduino.h"
#endif
#ifdef CHALETDUINO_V2_BRD
#include "BoardCfg_ChaletduinoV2.h"
#endif
int InitBoard();
#endif /* BOARDCFG_H */

166
Bootloader_PIC32.X/Source/BoardCfg_ChaletduinoV2.h Normal file
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/*
* File: DigitalIO_Chaletduino.h
* Author: JF
*
* Created on November 24, 2018, 3:20 PM
*/
#ifndef DIGITALIO_CHALETDUINO_H
#define DIGITALIO_CHALETDUINO_H
#ifdef __cplusplus
extern "C" {
#endif
/* ************************************************************************** */
/* Includes */
#include "define.h"
/* ************************************************************************** */
/* Defines */
//#include <plib.h>
#define SYS_FREQ (80000000L) //Clock period = 12.5 ns
#define PERIPHERAL_FREQ (80000000L)
//Output pins hardware definitions
//
#define HEARTBEAT_LED_2_PIN_DIR TRISEbits.TRISE6
#define HEARTBEAT_LED_2_PIN LATEbits.LATE6
#define HEARTBEAT_LED_2_TOGGLE_REG LATEINV
#define HEARTBEAT_LED_2_SET_REG LATESET
#define HEARTBEAT_LED_2_CLEAR_REG LATECLR
#define HEARTBEAT_LED_2_TOGGLE_MASK _LATG_LATE6_MASK
#define HEARTBEAT_LED_1_PIN_DIR TRISEbits.TRISE5
#define HEARTBEAT_LED_1_PIN LATEbits.LATE5
#define HEARTBEAT_LED_1_TOGGLE_REG LATEINV
#define HEARTBEAT_LED_1_SET_REG LATESET
#define HEARTBEAT_LED_1_CLEAR_REG LATECLR
#define HEARTBEAT_LED_1_TOGGLE_MASK _LATE_LATE5_MASK
#define LORA_ACTIVITY_LED_PIN_DIR TRISFbits.TRISF1
#define LORA_ACTIVITY_LED_PIN LATFbits.LATF1
#define LORA_ACTIVITY_LED_TOGGLE_REG LATFINV
#define LORA_ACTIVITY_LED_SET_REG LATFSET
#define LORA_ACTIVITY_LED_CLEAR_REG LATFCLR
#define LORA_ACTIVITY_LED_TOGGLE_MASK _LATE_LATF1_MASK
// #define GP_DEBUG_1_PIN_DIR TRISEbits.TRISE5
// #define GP_DEBUG_1_PIN LATEbits.LATE5
// #define GP_DEBUG_2_PIN_DIR TRISEbits.TRISE6
// #define GP_DEBUG_2_PIN LATEbits.LATE6
// #define SD_CARD_DETECT_PIN_DIR TRISDbits.TRISD8
// #define SD_CARD_DETECT_PIN LATDbits.LATD8
//SPI port defs
#define SPI_SDO_PIN_DIR TRISGbits.TRISG8
#define SPI_SDI_PIN_DIR TRISGbits.TRISG7
#define SPI_SCK_PIN_DIR TRISGbits.TRISG6
//SD Card
#define SD_SPI_SS_PIN_DIR TRISBbits.TRISB13
#define SD_SPI_SS_PIN LATBbits.LATB13
//SPI Flash
#define FLASH_SS_PIN_DIR TRISEbits.TRISE3
#define FLASH_SS_PIN LATEbits.LATE3
//Wifi (WINC3400 module)
#define WIFI_SPI_SS_PIN_DIR TRISEbits.TRISE0
#define WIFI_SPI_SS_PIN LATEbits.LATE0
#define WIFI_IRQ_PIN_DIR TRISDbits.TRISD0
#define WIFI_IRQ_PIN PORTDbits.RD0
// #define WIFI_SPI_CFG_PIN_DIR TRISEbits.TRISE1
// #define WIFI_SPI_CFG_PIN LATEbits.LATE1
#define WIFI_CHP_EN_PIN_DIR TRISEbits.TRISE2
#define WIFI_CHP_EN_PIN LATEbits.LATE2
#define WIFI_CHP_RST_PIN_DIR TRISEbits.TRISE4
#define WIFI_CHP_RST_PIN LATEbits.LATE4
//Chalet power relay
#define POWER_RELAY_ON_PIN_DIR TRISEbits.TRISE7
#define POWER_RELAY_ON_PIN LATEbits.LATE7 //X2-
#define POWER_RELAY_OFF_PIN_DIR TRISGbits.TRISG9
#define POWER_RELAY_OFF_PIN LATGbits.LATG9 //X3-
//Harakiri relay
#define HARAKIRI_RELAY_ON_PIN_DIR TRISDbits.TRISD6
#define HARAKIRI_RELAY_ON_PIN LATDbits.LATD6
//12V presence detection input
#define CHALET_12V_PRESENCE_PIN_DIR TRISBbits.TRISB15
#define CHALET_12V_PRESENCE_PIN PORTBbits.RB15 //X2-
//Battery voltage measurement (analog input)
#define BATTERY_VOLTAGE_ANALOG_PIN_DIR TRISBbits.TRISB1 //X2-7
// //Current sensor. Those pins tristate is controlled by the I2C module
//#define CURRENT_MODULE_I2C_SCL_PIN_DIR TRISDbits.TRISD3
//#define CURRENT_MODULE_I2C_SDA_PIN_DIR TRISDbits.TRISD2
//Onboard temperature sensor (SPI)
#define TEMP_SENSOR_CS_PIN_DIR TRISDbits.TRISD4
#define TEMP_SENSOR_CS_PIN LATDbits.LATD4
#define TEMP_SENSOR_SPI_SDO_PIN_DIR TRISDbits.TRISD3
#define TEMP_SENSOR_SPI_SDI_PIN_DIR TRISDbits.TRISD2
#define TEMP_SENSOR_SPI_SCK_PIN_DIR TRISDbits.TRISD1
//Analog (Hall effect) current sensor
#define CURRENT_SENSOR_IN1_PIN_DIR TRISBbits.TRISB2
#define CURRENT_SENSOR_IN2_PIN_DIR TRISBbits.TRISB0
//LoRa
#define LORA_MODULE_RELAY_PIN_DIR TRISDbits.TRISD11
#define LORA_MODULE_RELAY_PIN LATDbits.LATD11
#define LORA_MODULE_M0_PIN_DIR TRISEbits.TRISE7 //FUCK, double assignation avec Inverter ON
#define LORA_MODULE_M0_PIN LATEbits.LATE7
#define LORA_MODULE_M1_PIN_DIR TRISDbits.TRISD9
#define LORA_MODULE_M1_PIN LATDbits.LATD9
#define LORA_MODULE_INT_PIN_DIR TRISDbits.TRISD8
#define LORA_MODULE_INT_PIN PORTDits.RD8
#define LORA_MODULE_RX_LED_PIN_DIR TRISCbits.TRISC14
#define LORA_MODULE_RX_LED_PIN LATCbits.LATC14
#define LORA_MODULE_TX_LED_PIN_DIR TRISCbits.TRISC13
#define LORA_MODULE_TX_LED_PIN LATCbits.LATC13
//LCD Screen
#define LCD_RS_PIN_DIR TRISDbits.TRISD5
#define LCD_RS_PIN LATDbits.LATD5
#define LCD_RW_PIN_DIR TRISBbits.TRISB13
#define LCD_RW_PIN LATBbits.LATB13
#define LCD_E_PIN_DIR TRISBbits.TRISB12
#define LCD_E_PIN LATBbits.LATB12
#define LCD_DB4_PIN_DIR TRISBbits.TRISB3
#define LCD_DB4_PIN LATBbits.LATB3
#define LCD_DB5_PIN_DIR TRISBbits.TRISB9
#define LCD_DB5_PIN LATBbits.LATB9
#define LCD_DB6_PIN_DIR TRISBbits.TRISB10
#define LCD_DB6_PIN LATBbits.LATB10
#define LCD_DB7_PIN_DIR TRISBbits.TRISB11
#define LCD_DB7_PIN LATBbits.LATB11
//#define LCD_SCROLL_BTN_PIN_DIR TRISCbits.TRISC13
//#define LCD_SCROLL_BTN_PIN PORTCbits.PORTC13
/* ************************************************************************** */
/* Prototypes */
void InitDigitalIO(void);
#ifdef __cplusplus
}
#endif
#endif /* DIGITALIO_PINGUINO_H */

1004
Bootloader_PIC32.X/Source/BootloaderInterface.c Normal file
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174
Bootloader_PIC32.X/Source/BootloaderInterface.h Normal file
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/*
* File: ChaletPowerRelay.h
* Author: JF
*
* Created on November 30, 2018, 7:33 PM
*/
#ifndef BOOTLOADERINTERFACE_H
#define BOOTLOADERINTERFACE_H
#include "define.h"
//#define USE_FULL_IMPLEMENTATION
#define BOOTLOADER_FILE_HEADER_CODE (int)0xBAADBEEF
#define BOOTLOADER_RECORD_HEADER_CODE (int)0xDEADBEEF
#define BOOTLOADER_FLASH_FIRMWARE_VALIDATOR 0xA8
#define BOOTLOADER_ENTER_UPLOAD_MODE_VALIDATOR 0x5A
typedef struct
{
unsigned char BootloaderAction;
unsigned char BootloaderActionValidator;
}stBootloaderFlags_t;
extern stBootloaderFlags_t mBootloaderFlags;
enum eBootloaderFlagsIndex
{
BOOTLOADER_FLAGS_ACTION_FLAG_INDEX = 0,
BOOTLOADER_FLAGS_ACTION_VALIDATOR_INDEX,
BOOTLOADER_FLAGS_MAX_INDEX = 12
};
enum eBootloaderActionFlagValues
{
BOOTLOADER_ACTION_JUMP_TO_APP_VALUE = 0,
BOOTLOADER_ACTION_FLASH_FIRMWARE_VALUE = 1,
BOOTLOADER_ACTION_ENTER_UPDATE_MODE_VALUE = 2,
BOOTLOADER_ACTION_MAX_VALUE
};
#ifdef USE_FULL_IMPLEMENTATION
enum eBootloaderStates
{
BOOTLOADER_STANDBY_STATE,
BOOTLOADER_ACTIVE_STATE,
BOOTLOADER_ERASE_FLASH_STATE,
BOOTLOADER_RECEIVING_FIRMWARE_STATE,
BOOTLOADER_SENDING_FIRMWARE_COPY_STATE,
BOOTLOADER_PRINTING_FIRMWARE_STATE,
BOOTLOADER_MAX_STATE
};
enum eBootloaderStateMachineEvents
{
BOOTLOADER_TICK_EVENT,
BOOTLOADER_NEW_CMD_EVENT,
BOOTLOADER_TIMEOUT_EVENT,
BOOTLOADER_MAX_EVENT
};
enum eBootloaderFlashEraseStates
{
BOOTLOADER_FLASH_ERASE_SECTOR_STATE,
BOOTLOADER_FLASH_ERASE_WAIT_FOR_SECTOR_DONE,
BOOTLOADER_FLASH_ERASE_CHECKBACK_STATE,
BOOTLOADER_FLASH_ERASE_FINISHED_STATE,
BOOTLOADER_FLASH_ERASE_ERROR_STATE,
BOOTLOADER_FLASH_ERASE_MAX_STATE
};
enum eBootloaderFlashEraseResults
{
BOOTLOADER_FLASH_ERASE_RUNNING_RES,
BOOTLOADER_FLASH_ERASE_FINISHED_RES,
BOOTLOADER_FLASH_ERASE_ERROR_RES,
BOOTLOADER_FLASH_ERASE_ABORT_RES,
BOOTLOADER_FLASH_ERASE_MAX_RES
};
enum eBootloaderFlahsEraseSMEvents
{
BOOTLOADER_FLASH_ERASE_SM_TICK_EVENT,
BOOTLOADER_FLASH_ERASE_SM_ABORT_EVENT,
BOOTLOADER_FLASH_ERASE_SM_MAX_EVENT
};
enum eBootloaderFlashWriteStates
{
BOOTLOADER_FLASH_WRITE_STANDBY_STATE,
BOOTLOADER_FLASH_WRITE_BUFFER_STATE,
BOOTLOADER_FLASH_WRITE_WAIT_FOR_BYTE_DONE,
BOOTLOADER_FLASH_WRITE_CHECKBACK_STATE,
BOOTLOADER_FLASH_WRITE_FINISHED_STATE,
BOOTLOADER_FLASH_WRITE_ERROR_STATE,
BOOTLOADER_FLASH_WRITE_MAX_STATE
};
enum eBootloaderFlashWriteResults
{
BOOTLOADER_FLASH_WRITING_RES,
BOOTLOADER_FLASH_WRITE_FINISHED_RES,
BOOTLOADER_FLASH_WRITE_ERROR_RES,
BOOTLOADER_FLASH_WRITE_ABORT_RES,
BOOTLOADER_FLASH_WRITE_MAX_RES
};
enum eBootloaderFlahsWriteSMEvents
{
BOOTLOADER_FLASH_WRITE_SM_TICK_EVENT,
BOOTLOADER_FLASH_WRITE_SM_NEW_BUFFER_EVENT,
BOOTLOADER_FLASH_WRITE_SM_ABORT_EVENT,
BOOTLOADER_FLASH_WRITE_SM_MAX_EVENT
};
enum eBootloaderStateMachineCmds
{
BOOTLOADER_SM_ACTIVATE_CMD,
BOOTLOADER_SM_ABORT_CMD,
BOOTLOADER_SM_ERASE_FLASH_CMD,
BOOTLOADER_SM_INIT_UPLOAD_CMD,
BOOTLOADER_SM_NEW_DATA_CHUNK_CMD,
BOOTLOADER_SM_UPLOAD_FINISHED_CMD,
BOOTLOADER_SM_EXECUTE_UPGRAGE_CMD,
BOOTLOADER_SM_INVALID_CRC_CMD,
BOOTLOADER_SM_CHECK_FLASH_CMD
};
extern unsigned char BootloaderBuffer[300];
int BootloaderInterfaceInit();
void BootloaderExecuteCmd(char Cmd,int CRCValid);
void BootloaderCRCError(char Cmd, int RxCRC, int ExpectedCRC);
void BootloaderInterfaceTick();
void BootloaderInterfaceStateMachine(int Event, int Param);
void BootloaderResetStateMachine();
void BootloaderActivateBootloader();
void BootloaderDeactivateBootloader();
int BootloaderFlashEraseStateMachine(int event);
int ResetBootloaderFlashEraseStateMachine();
int BootloaderFlashWriteStateMachine(int event);
int ResetBootloaderFlashWriteStateMachine();
int BootloaderPrintFlashData();
#endif
int BootloaderCheckFlashBootloaderData();
int BootloaderBytesToInt(unsigned char *Bytes);
int BoootloaderGetBootloaderFlags();
#endif /* BOOTLOADERINTERFACE_H */

18
Bootloader_PIC32.X/Source/BootloaderProtocol.h
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@ -4,17 +4,17 @@
#define BOOTLOADER_PROTOCOL_H
#define PROTOCOL_HEADER 0xBA
#define MAX_SECTOR_SIZE 0x01000
//#define MAX_SECTOR_SIZE 0x01000
#define MAX_RX_BUFF_SIZE 0x100
#define MAX_TX_BUFF_SIZE 0x100
typedef struct
{
unsigned int SectorStartAddress;
unsigned short SectorSize;
unsigned int SectorData[MAX_SECTOR_SIZE];
}stDataSector_t;
//typedef struct
//{
// unsigned int SectorStartAddress;
// unsigned short SectorSize;
// unsigned int SectorData[MAX_SECTOR_SIZE];
//
//}stDataSector_t;
enum eBootloaderProtocolStates
{
@ -77,7 +77,7 @@ enum eBootloaderAcknowledgement
extern Bool e_CommandPending;
extern Bool e_FlashUpdateMode;
extern unsigned char RxDataBuffer[MAX_RX_BUFF_SIZE];
extern stDataSector_t CurrentDataSector;
//extern stDataSector_t CurrentDataSector;

870
Bootloader_PIC32.X/Source/BootloaderStateMachine.c
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@ -1,13 +1,13 @@
/*******************************************************************************
* *
* Copyright 2010 Rheinmetall Canada Inc. *
* *
* No part of this document may be reproduced, stored in *
* a retrieval system, or transmitted, in any form or by any means, *
* electronic, mechanical, photocopying, recording, or otherwise, *
* without the prior written permission of Rheinmetall Canada Inc. *
* *
*******************************************************************************/
* *
* Copyright 2010 Rheinmetall Canada Inc. *
* *
* No part of this document may be reproduced, stored in *
* a retrieval system, or transmitted, in any form or by any means, *
* electronic, mechanical, photocopying, recording, or otherwise, *
* without the prior written permission of Rheinmetall Canada Inc. *
* *
*******************************************************************************/
/*---- example include file ---------------------------------------------------*/
@ -16,6 +16,8 @@
#include "FlashInterface.h"
#include "BootloaderProtocol.h"
#include "InternalUart.h"
#include "BootloaderInterface.h"
#include "FlashMapping.h"
#include <plib.h>
//#include <string.h>
//#include <stdio.h>
@ -24,304 +26,698 @@
unsigned int mSMState;
unsigned int mPseudoTimer;
extern unsigned long _app_start;
int mIsSPIFlashDetected;
void BootloaderSMInit(void)
{
mSMState = SM_UPDATE_WAIT_STATE;
mSMState = SM_CHECK_BOOTLOADER_FLAGS;
mPseudoTimer = 0;
mIsSPIFlashDetected = 0;
}
#pragma CODE_SECTION(BootloaderSM,"ramfuncs");
//#pragma CODE_SECTION(BootloaderSM,"ramfuncs");
void BootloaderSM(unsigned int event, unsigned int Data)
{
switch(mSMState)
{
case SM_UPDATE_WAIT_STATE:
case SM_STANDBY_STATE:
{
switch(event)
{
case SM_TICK_EVENT:
{
if(mPseudoTimer++ >= PSEUDO_TIMER_VALUE)
{
char mbuf[30];
mbuf[0] = 'R';
mbuf[1] = 'e';
mbuf[2] = 'b';
mbuf[3] = 'o';
mbuf[4] = 'o';
mbuf[5] = 't';
mbuf[6] = 'i';
mbuf[7] = 'n';
mbuf[8] = 'g';
mbuf[9] = ' ';
mbuf[10] = 'i';
mbuf[11] = 'n';
mbuf[12] = ' ';
mbuf[13] = 'a';
mbuf[14] = 'p';
mbuf[15] = 'p';
mbuf[16] = '\r';
SendInternalUartData(&mbuf[0],17);
mPseudoTimer = 0;
// #ifndef _DEBUG
JumpToApp();
// #endif
}
break;
}
case SM_RX_CMD_EVENT:
{
if(Data == CONNECT_REQUEST_CMD)
{
mSMState = SM_IDLE_STATE;
ProtocolSendAck(PROTOCOL_ACK,RET_PROTOCOL_OK); //Bootloader ack
}
//Ignore any other command received...
break;
}
case SM_ABORT_UPDATE:
{
break;
}
}
break; //case SM_UPDATE_WAIT_STATE:
break;
}
case SM_IDLE_STATE:
case SM_CHECK_BOOTLOADER_FLAGS:
{
switch(event)
{
case SM_TICK_EVENT:
{
break;
}
case SM_RX_CMD_EVENT:
{
switch(Data)
//First, check if SPI flash is functionnal
if(mIsSPIFlashDetected == 0)
{
case START_UPDATE_REQUEST_CMD:
//Flash is not functionnal...
//TODO: Check if we need to update via serial port
// JumpToApp();
}
//Flash is detected. Check the bootloader flags...
BoootloaderGetBootloaderFlags();
// if(BootloaderAction == 0)
// {
// JumpToApp();
// }
// else if(BootloaderAction == 1)
// {
// if( BootloaderAction == 0xA8)
// {
// //It's requested to write the firmware to PIC's Flash. Let's check SPI flash data integrity.
// mSMState = SM_CHECK_FIRMWARE_VALIDITY;
// }
// else
// {
// //TODO: What should we do?
// JumpToApp();
// }
// }
// else
// {
// //TODO
// JumpToApp();
// }
switch(mBootloaderFlags.BootloaderAction)
{
case BOOTLOADER_ACTION_JUMP_TO_APP_VALUE:
{
mSMState = SM_WAIT_FOR_UNLOCK_STATE;
ProtocolSendAck(PROTOCOL_ACK,RET_PROTOCOL_OK); //Bootloader ack
char mbuf[30];
mbuf[0] = 'G';
mbuf[1] = 'o';
mbuf[2] = 'i';
mbuf[3] = 'n';
mbuf[4] = 'g';
mbuf[5] = ' ';
mbuf[6] = 'S';
mbuf[7] = 't';
mbuf[8] = 'd';
mbuf[9] = 'b';
mbuf[10] = 'y';
mbuf[11] = '\n';
mbuf[12] = '\r';
SendInternalUartData(&mbuf[0],13);
mSMState = SM_STANDBY_STATE;
JumpToApp();
break;
}
case HEARTBEAT_REQUEST_CMD:
case BOOTLOADER_ACTION_FLASH_FIRMWARE_VALUE:
{
ProtocolSendCmd(HEARTBEAT_CMD,0,0);
if( mBootloaderFlags.BootloaderActionValidator == BOOTLOADER_FLASH_FIRMWARE_VALIDATOR)
{
//It's requested to write the firmware to PIC's Flash. Let's check SPI flash data integrity.
mSMState = SM_CHECK_FIRMWARE_VALIDITY;
}
else
{
//TODO: What should we do?
JumpToApp();
}
break;
}
case END_UPDATE_REQUEST_CMD:
{
ProtocolSendAck(PROTOCOL_ACK,RET_PROTOCOL_OK); //Bootloader ack
SoftReset(); //simply reset cpu.
break;
}
case FLASH_API_VER_REQUEST_CMD:
{
char Version;
Version = 0x01;
ProtocolSendCmd(FLASH_API_VER_CMD,&Version,1);
break;
}
case SCRUB_FLASH_REQUEST_CMD:
case BOOTLOADER_ACTION_ENTER_UPDATE_MODE_VALUE:
{
//TODO
JumpToApp();
break;
}
default:
{
JumpToApp();
break;
}
}
//
break;
}
case SM_RX_CMD_EVENT:
case SM_ABORT_UPDATE:
default:
{
ProtocolSendAck(PROTOCOL_ACK,RET_PROTOCOL_OK); //Bootloader ack
SoftReset();
break;
}
}
break; //case SM_IDLE_STATE:
break;
}
case SM_WAIT_FOR_UNLOCK_STATE:
case SM_CHECK_FIRMWARE_VALIDITY:
{
switch(event)
{
case SM_TICK_EVENT:
{
if(BootloaderCheckFlashBootloaderData() == RET_OK)
{
//All is good, let's write the firmware to PIC's program Flash
mSMState = SM_ERASE_INTERNAL_FLASH;
}
else
{
//TODO: What should we do?
JumpToApp();
}
break;
}
case SM_RX_CMD_EVENT:
default:
{
if(Data == BOOTLOADER_UNLOCK_REQUEST_CMD)
break;
}
}
break;
}
case SM_ERASE_INTERNAL_FLASH:
{
switch(event)
{
case SM_TICK_EVENT:
{
if(FlashErase() == FLASH_STATUS_ERROR)
{
if(RxDataBuffer[0] == BOOTLOADER_UNLOCK_CODE)
{
ProtocolSendAck(PROTOCOL_ACK,RET_PROTOCOL_FLASH_ERASE); //Inform PTE that flash is being erased
// #ifndef _DEBUG //don't touch FLASH in debug mode...
//Erase FLASH
if(FlashErase() != FLASH_STATUS_OK)
{
ProtocolSendAck(PROTOCOL_NACK,RET_PROTOCOL_ERR_ERASE_FLASH_FAILED); //Acknowledge...
mSMState = SM_IDLE_STATE;
break;
}
// #endif
mSMState = SM_WAIT_FOR_NEXT_RECORD;
ProtocolSendAck(PROTOCOL_ACK,RET_PROTOCOL_OK);
}
else//Invalid unlock code... return to IDLE...
{
mSMState = SM_IDLE_STATE;
ProtocolSendAck(PROTOCOL_NACK,RET_PROTOCOL_ERR_INVALID_UNLOCK_CODE);
}
char mbuf[30];
mbuf[0] = 'F';
mbuf[1] = 'l';
mbuf[2] = 'a';
mbuf[3] = 's';
mbuf[4] = 'h';
mbuf[5] = ' ';
mbuf[6] = 'E';
mbuf[7] = 'r';
mbuf[8] = 'r';
mbuf[9] = 'o';
mbuf[10] = 'r';
mbuf[11] = '\n';
mbuf[12] = '\r';
SendInternalUartData(&mbuf[0],13);
mSMState = SM_STANDBY_STATE;
break;
}
else//If another command than UNLOCK is received... return to IDLE
else
{
mSMState = SM_IDLE_STATE;
ProtocolSendAck(PROTOCOL_NACK,RET_PROTOCOL_ERR_UNLOCK_EXPECTED);
// mSMState = SM_STANDBY_STATE;
char mbuf[30];
mbuf[0] = 'F';
mbuf[1] = 'l';
mbuf[2] = 'a';
mbuf[3] = 's';
mbuf[4] = 'h';
mbuf[5] = ' ';
mbuf[6] = 'E';
mbuf[7] = 'r';
mbuf[8] = 'a';
mbuf[9] = 's';
mbuf[10] = 'e';
mbuf[11] = 'd';
mbuf[12] = '\n';
mbuf[13] = '\r';
SendInternalUartData(&mbuf[0],14);
mSMState = SM_WRITE_DATA_TO_PROGRAM_FLASH;
}
break;
}
default:
{
break;
}
}
break;
}
case SM_WRITE_DATA_TO_PROGRAM_FLASH:
{
switch(event)
{
case SM_TICK_EVENT:
{
//First, load the firmware info.
unsigned char FlashData[100];
unsigned int FlashAddress = FLASH_BTLDR_FIRMWARE_START_ADDRESS;
unsigned int FileHeaderCode, FirmwareFlags, NbRecords, FirmwareSize, VersionCode, CRC32;
// unsigned int ComputedCRC32 = CRC_START_32;
}
break; //case SM_RX_CMD_EVENT
}
case SM_ABORT_UPDATE:
{
break;
}
}
break; //case SM_WAIT_FOR_UNLOCK_STATE:
}
case SM_WAIT_FOR_NEXT_RECORD:
{
switch(event)
{
case SM_TICK_EVENT:
{
break;
}
case SM_RX_CMD_EVENT:
{
switch(Data)
//SPIFlashReadBuffer(FlashData,700,FlashAddress);
//printf("Checking Flash bootloader data integrity... \n");
SPIFlashReadBuffer(FlashData,FLASH_BTLDR_HEADER_SIZE,FlashAddress);
FileHeaderCode = BootloaderBytesToInt(FlashData);
FirmwareFlags = BootloaderBytesToInt(&FlashData[4]);
NbRecords = BootloaderBytesToInt(&FlashData[8]);
FirmwareSize = BootloaderBytesToInt(&FlashData[12]);
VersionCode = BootloaderBytesToInt(&FlashData[16]);
CRC32 = BootloaderBytesToInt(&FlashData[20]);
//TODO: Do we need to recheck validity? It's just been done before...
FlashAddress += FLASH_BTLDR_HEADER_SIZE; //point to the start of bootloader data
if(NbRecords > 0)
{
case SEND_RECORD_REQUEST_CMD:
int CurRecord = 0;
unsigned int Done = false;
unsigned int RecHeader, RecSize, RecStartAddress;
while(Done == false)
{
//TODO: Address check...
ProtocolSendAck(PROTOCOL_ACK,RET_PROTOCOL_FLASH_WRITE);
SPIFlashReadBuffer(&FlashData[0],12,FlashAddress);
RecHeader = BootloaderBytesToInt(&FlashData[0]);
RecSize = BootloaderBytesToInt(&FlashData[4]); //This is in bytes
RecSize /= 4;
RecStartAddress = BootloaderBytesToInt(&FlashData[8]);
FlashAddress += 12;
// unsigned int SectorStartAddress;
// unsigned short SectorSize;
// unsigned int *RecordDataPtr;
// unsigned int data;
//
// SectorStartAddress = *(unsigned int*)(&RxDataBuffer[0]);
// SectorSize = *(unsigned short*)(&RxDataBuffer[4]);
// RecordDataPtr = (unsigned int*)&RxDataBuffer[8];
// data = *RecordDataPtr;
// unsigned int test = KVA_TO_PA(APPLICATION_START_ADDRESS);
if(RecHeader != BOOTLOADER_RECORD_HEADER_CODE)
{
//TODO: What
}
// if(RecSize == 0)
// {
//TODO: What
// return RET_ERROR;
// }
//Load the firmware data from SPI Flash
CurrentDataSector.SectorStartAddress = RecStartAddress;
CurrentDataSector.SectorSize = RecSize;
int RecWord;
for(RecWord = 0; RecWord < RecSize; RecWord++)
{
char WordBytes[4];
int Word;
SPIFlashReadBuffer(WordBytes,4,FlashAddress);
// Word = BootloaderBytesToInt(WordBytes);
Word = BootloaderBytesToIntLittleEndian(WordBytes);
CurrentDataSector.SectorData[RecWord] = Word;
FlashAddress += 4;
}
//Write it to PIC's internal flash
if(CurrentDataSector.SectorStartAddress < KVA_TO_PA(APPLICATION_FLASH_START_ADDRESS))
{
ProtocolSendAck(PROTOCOL_NACK,RET_PROTOCOL_ERR_INVALID_ADDRESS);
break;
//TODO: Manage this!
}
else if(FlashProgramData((void*)(CurrentDataSector.SectorStartAddress), CurrentDataSector.SectorData , CurrentDataSector.SectorSize) != FLASH_STATUS_OK)
{
ProtocolSendAck(PROTOCOL_NACK,RET_PROTOCOL_ERR_WRITE_FLASH_FAILED);
break;
//TODO: Manage this!
char mbuf[30];
mbuf[0] = 'W';
mbuf[1] = 'r';
mbuf[2] = 'i';
mbuf[3] = 't';
mbuf[4] = 'e';
mbuf[5] = ' ';
mbuf[6] = 'E';
mbuf[7] = 'r';
mbuf[8] = 'r';
mbuf[9] = 'o';
mbuf[10] = 'r';
mbuf[11] = '\n';
mbuf[12] = '\r';
SendInternalUartData(&mbuf[0],13);
}
CurRecord++;
if(CurRecord == NbRecords)
{
Done = true;
break;
}
ProtocolSendAck(PROTOCOL_ACK,RET_PROTOCOL_OK);
break;
}
case END_UPDATE_REQUEST_CMD:
{
ProtocolSendAck(PROTOCOL_ACK,RET_PROTOCOL_OK);
#ifndef _DEBUG
JumpToApp();
#else
mSMState = SM_IDLE_STATE;
#endif
break;
}
}
break; //case SM_RX_CMD_EVENT:
//Fimware is all written successfully
mSMState = SM_CHECK_PROGRAM_FLASH_VALIDITY;
break;
}
case SM_ABORT_UPDATE:
default:
{
break;
}
// CurrentDataSector.SectorStartAddress
break;
}
case SM_CHECK_PROGRAM_FLASH_VALIDITY:
{
switch(event)
{
case SM_TICK_EVENT:
{
//TODO: Compute CRC32...
mSMState = SM_STANDBY_STATE;
char mbuf[30];
mbuf[0] = 'F';
mbuf[1] = 'l';
mbuf[2] = 'a';
mbuf[3] = 's';
mbuf[4] = 'h';
mbuf[5] = ' ';
mbuf[6] = 'P';
mbuf[7] = 'r';
mbuf[8] = 'o';
mbuf[9] = 'g';
mbuf[10] = 'r';
mbuf[11] = 'a';
mbuf[12] = 'm';
mbuf[13] = 'm';
mbuf[14] = 'e';
mbuf[15] = 'd';
mbuf[16] = '\n';
mbuf[17] = '\r';
SendInternalUartData(&mbuf[0],19);
char toto[2];
toto[0] = 0;
toto[1] = 0;
SPIFlashWriteBuffer(toto,2,0x000000);
JumpToApp();
}
break;
}
default:
{
break;
}
}
break;
}
case SM_ERROR_STATE:
{
// TODO: Manage this state
break;
}
break; //case SM_WAIT_FOR_NEXT_RECORD:
}
}
}
void JumpToApp()
{
// CloseInternalUart();
void (*fptr)(void);
fptr = (void (*)(void))APPLICATION_START_ADDRESS;
fptr();
}
void DownloadFlash(unsigned int StartAddress, unsigned int EndAddress)
{
/*
unsigned int CurAddress = StartAddress;
unsigned int Data;
unsigned int delay = 0;
char Buf[100];
int i = 0;
while(CurAddress < EndAddress)
//void BootloaderSM(unsigned int event, unsigned int Data)
//{
// switch(mSMState)
// {
// case SM_UPDATE_WAIT_STATE:
// {
// switch(event)
// {
// case SM_TICK_EVENT:
// {
// if(mPseudoTimer++ >= PSEUDO_TIMER_VALUE)
// {
// char mbuf[30];
// mbuf[0] = 'R';
// mbuf[1] = 'e';
// mbuf[2] = 'b';
// mbuf[3] = 'o';
// mbuf[4] = 'o';
// mbuf[5] = 't';
// mbuf[6] = 'i';
// mbuf[7] = 'n';
// mbuf[8] = 'g';
// mbuf[9] = ' ';
// mbuf[10] = 'i';
// mbuf[11] = 'n';
// mbuf[12] = ' ';
// mbuf[13] = 'a';
// mbuf[14] = 'p';
// mbuf[15] = 'p';
// mbuf[16] = '\r';
// SendInternalUartData(&mbuf[0],17);
// mPseudoTimer = 0;
//// #ifndef _DEBUG
//// JumpToApp();
//// #endif
// }
// break;
// }
// case SM_RX_CMD_EVENT:
// {
// if(Data == CONNECT_REQUEST_CMD)
// {
// mSMState = SM_IDLE_STATE;
// ProtocolSendAck(PROTOCOL_ACK,RET_PROTOCOL_OK); //Bootloader ack
// }
//
// //Ignore any other command received...
//
// break;
// }
// case SM_ABORT_UPDATE:
// {
// break;
// }
// }
// break; //case SM_UPDATE_WAIT_STATE:
// }
// case SM_IDLE_STATE:
// {
// switch(event)
// {
// case SM_TICK_EVENT:
// {
// break;
// }
// case SM_RX_CMD_EVENT:
// {
// switch(Data)
// {
// case START_UPDATE_REQUEST_CMD:
// {
// mSMState = SM_WAIT_FOR_UNLOCK_STATE;
// ProtocolSendAck(PROTOCOL_ACK,RET_PROTOCOL_OK); //Bootloader ack
// break;
// }
// case HEARTBEAT_REQUEST_CMD:
// {
// ProtocolSendCmd(HEARTBEAT_CMD,0,0);
// break;
// }
// case END_UPDATE_REQUEST_CMD:
// {
// ProtocolSendAck(PROTOCOL_ACK,RET_PROTOCOL_OK); //Bootloader ack
// SoftReset(); //simply reset cpu.
// break;
// }
// case FLASH_API_VER_REQUEST_CMD:
// {
// char Version;
// Version = 0x01;
// ProtocolSendCmd(FLASH_API_VER_CMD,&Version,1);
// break;
// }
// case SCRUB_FLASH_REQUEST_CMD:
// {
// //TODO
// break;
// }
// }
// break;
// }
// case SM_ABORT_UPDATE:
// {
// ProtocolSendAck(PROTOCOL_ACK,RET_PROTOCOL_OK); //Bootloader ack
// SoftReset();
// break;
// }
// }
// break; //case SM_IDLE_STATE:
// }
// case SM_WAIT_FOR_UNLOCK_STATE:
// {
// switch(event)
// {
// case SM_TICK_EVENT:
// {
// break;
// }
// case SM_RX_CMD_EVENT:
// {
// if(Data == BOOTLOADER_UNLOCK_REQUEST_CMD)
// {
// if(RxDataBuffer[0] == BOOTLOADER_UNLOCK_CODE)
// {
// ProtocolSendAck(PROTOCOL_ACK,RET_PROTOCOL_FLASH_ERASE); //Inform PTE that flash is being erased
//
// // #ifndef _DEBUG //don't touch FLASH in debug mode...
// //Erase FLASH
// if(FlashErase() != FLASH_STATUS_OK)
// {
// ProtocolSendAck(PROTOCOL_NACK,RET_PROTOCOL_ERR_ERASE_FLASH_FAILED); //Acknowledge...
// mSMState = SM_IDLE_STATE;
// break;
// }
// // #endif
//
// mSMState = SM_WAIT_FOR_NEXT_RECORD;
// ProtocolSendAck(PROTOCOL_ACK,RET_PROTOCOL_OK);
// }
// else//Invalid unlock code... return to IDLE...
// {
// mSMState = SM_IDLE_STATE;
// ProtocolSendAck(PROTOCOL_NACK,RET_PROTOCOL_ERR_INVALID_UNLOCK_CODE);
// }
// }
// else//If another command than UNLOCK is received... return to IDLE
// {
// mSMState = SM_IDLE_STATE;
// ProtocolSendAck(PROTOCOL_NACK,RET_PROTOCOL_ERR_UNLOCK_EXPECTED);
//
// }
//
// break; //case SM_RX_CMD_EVENT
// }
// case SM_ABORT_UPDATE:
// {
// break;
// }
// }
// break; //case SM_WAIT_FOR_UNLOCK_STATE:
// }
// case SM_WAIT_FOR_NEXT_RECORD:
// {
// switch(event)
// {
// case SM_TICK_EVENT:
// {
// break;
// }
// case SM_RX_CMD_EVENT:
// {
// switch(Data)
// {
// case SEND_RECORD_REQUEST_CMD:
// {
// //TODO: Address check...
// ProtocolSendAck(PROTOCOL_ACK,RET_PROTOCOL_FLASH_WRITE);
//
//// unsigned int SectorStartAddress;
//// unsigned short SectorSize;
//// unsigned int *RecordDataPtr;
//// unsigned int data;
////
//// SectorStartAddress = *(unsigned int*)(&RxDataBuffer[0]);
//// SectorSize = *(unsigned short*)(&RxDataBuffer[4]);
//// RecordDataPtr = (unsigned int*)&RxDataBuffer[8];
//// data = *RecordDataPtr;
//
// // unsigned int test = KVA_TO_PA(APPLICATION_START_ADDRESS);
//
// if(CurrentDataSector.SectorStartAddress < KVA_TO_PA(APPLICATION_FLASH_START_ADDRESS))
// {
// ProtocolSendAck(PROTOCOL_NACK,RET_PROTOCOL_ERR_INVALID_ADDRESS);
// break;
// }
// else if(FlashProgramData((void*)(CurrentDataSector.SectorStartAddress), CurrentDataSector.SectorData , CurrentDataSector.SectorSize) != FLASH_STATUS_OK)
// {
// ProtocolSendAck(PROTOCOL_NACK,RET_PROTOCOL_ERR_WRITE_FLASH_FAILED);
// break;
// }
//
//
// ProtocolSendAck(PROTOCOL_ACK,RET_PROTOCOL_OK);
//
//
// break;
// }
// case END_UPDATE_REQUEST_CMD:
// {
// ProtocolSendAck(PROTOCOL_ACK,RET_PROTOCOL_OK);
//
// #ifndef _DEBUG
// JumpToApp();
// #else
// mSMState = SM_IDLE_STATE;
// #endif
// break;
// }
//
// }
//
// break; //case SM_RX_CMD_EVENT:
// }
// case SM_ABORT_UPDATE:
// {
// break;
// }
// }
// break; //case SM_WAIT_FOR_NEXT_RECORD:
// }
// }
//}
void JumpToApp()
{
// CloseInternalUart();
char mbuf[30];
mbuf[0] = 'R';
mbuf[1] = 'e';
mbuf[2] = 'b';
mbuf[3] = 'o';
mbuf[4] = 'o';
mbuf[5] = 't';
mbuf[6] = 'i';
mbuf[7] = 'n';
mbuf[8] = 'g';
mbuf[9] = ' ';
mbuf[10] = 'i';
mbuf[11] = 'n';
mbuf[12] = ' ';
mbuf[13] = 'a';
mbuf[14] = 'p';
mbuf[15] = 'p';
mbuf[16] = '\r';
SendInternalUartData(&mbuf[0],17);
void (*fptr)(void);
fptr = (void (*)(void))APPLICATION_START_ADDRESS;
fptr();
}
void BootloaderSMSetSPIFlashDetected(int Detected)
{
Data = (CurAddress >> 16);
sprintf(Buf, "0x%.4X",Data);
SendInternalUartData(Buf,strlen(Buf));
// ProtocolSendCmd(FLASH_DATA_CMD,Buf,strlen(Buf));
Data = CurAddress;
sprintf(Buf, "%.4X ",Data);
SendInternalUartData(Buf,strlen(Buf));
// ProtocolSendCmd(FLASH_DATA_CMD,Buf,strlen(Buf));
for(i = 0; i < 16; i++)
{
Data = *(unsigned int*)CurAddress;
if(i != 15)
sprintf(Buf, "%.4X ",Data);
else
sprintf(Buf, "%.4X \r",Data);
SendInternalUartData(Buf,strlen(Buf));
// ProtocolSendCmd(FLASH_DATA_CMD,Buf,strlen(Buf));
CurAddress++;
// while(delay++ < 5000);
delay = 0;
}
mIsSPIFlashDetected = Detected;
}
e_FlashUpdateMode = false;
*/
}
//EOf
void BootloaderSMReadBootloaderFlags()
{
}
void DownloadFlash(unsigned int StartAddress, unsigned int EndAddress)
{
/*
unsigned int CurAddress = StartAddress;
unsigned int Data;
unsigned int delay = 0;
char Buf[100];
int i = 0;
while(CurAddress < EndAddress)
{
Data = (CurAddress >> 16);
sprintf(Buf, "0x%.4X",Data);
SendInternalUartData(Buf,strlen(Buf));
// ProtocolSendCmd(FLASH_DATA_CMD,Buf,strlen(Buf));
Data = CurAddress;
sprintf(Buf, "%.4X ",Data);
SendInternalUartData(Buf,strlen(Buf));
// ProtocolSendCmd(FLASH_DATA_CMD,Buf,strlen(Buf));
for(i = 0; i < 16; i++)
{
Data = *(unsigned int*)CurAddress;
if(i != 15)
sprintf(Buf, "%.4X ",Data);
else
sprintf(Buf, "%.4X \r",Data);
SendInternalUartData(Buf,strlen(Buf));
// ProtocolSendCmd(FLASH_DATA_CMD,Buf,strlen(Buf));
CurAddress++;
// while(delay++ < 5000);
delay = 0;
}
}
e_FlashUpdateMode = false;
*/
}
//EOf

20
Bootloader_PIC32.X/Source/BootloaderStateMachine.h
View File

@ -10,10 +10,19 @@
enum eBootloaderSMStates
{
SM_UPDATE_WAIT_STATE,
SM_IDLE_STATE,
SM_WAIT_FOR_UNLOCK_STATE,
SM_WAIT_FOR_NEXT_RECORD
// SM_UPDATE_WAIT_STATE,
// SM_IDLE_STATE,
// SM_WAIT_FOR_UNLOCK_STATE,
// SM_WAIT_FOR_NEXT_RECORD
SM_STANDBY_STATE,
SM_CHECK_BOOTLOADER_FLAGS,
SM_CHECK_FIRMWARE_VALIDITY,
SM_ERASE_INTERNAL_FLASH,
SM_WRITE_DATA_TO_PROGRAM_FLASH,
SM_CHECK_PROGRAM_FLASH_VALIDITY,
SM_ERROR_STATE
};
enum eBootloaderEvents
@ -21,6 +30,7 @@ enum eBootloaderEvents
SM_TICK_EVENT,
SM_RX_CMD_EVENT,
SM_ABORT_UPDATE
};
@ -28,6 +38,8 @@ void BootloaderSMInit(void);
void BootloaderSM( unsigned int event, unsigned int Data );
void JumpToApp(void);
void DownloadFlash(unsigned int StartAddress, unsigned int EndAddress);
void BootloaderSMSetSPIFlashDetected(int Detected);
void BootloaderSMReadBootloaderFlags();
#endif

202
Bootloader_PIC32.X/Source/ChaletduinoV2Board.c Normal file
View File

@ -0,0 +1,202 @@
#include "BoardCfg.h"
int InitBoard()
{
HEARTBEAT_LED_1_PIN_DIR = PIN_OUTPUT;
HEARTBEAT_LED_2_PIN_DIR = PIN_OUTPUT;
HEARTBEAT_LED_2_PIN = LED_OFF;
HEARTBEAT_LED_1_PIN = LED_ON;
LORA_ACTIVITY_LED_PIN_DIR = PIN_OUTPUT;
LORA_ACTIVITY_LED_PIN = LED_OFF;
// GP_DEBUG_1_PIN_DIR = PIN_OUTPUT;
// GP_DEBUG_1_PIN = 0;
// GP_DEBUG_2_PIN_DIR = PIN_OUTPUT;
// GP_DEBUG_2_PIN = 0;
SPI_SDI_PIN_DIR = PIN_INPUT;
SD_SPI_SS_PIN_DIR = PIN_OUTPUT;
SPI_SDO_PIN_DIR = PIN_OUTPUT;
SPI_SCK_PIN_DIR = PIN_OUTPUT;
//////////////// SPI FLASH //////////////////
FLASH_SS_PIN_DIR = PIN_OUTPUT;
FLASH_SS_PIN = 1;
/////////////////////////// WIFI ///////////////////
//Wifi (WINC1500 module)
WIFI_SPI_SS_PIN_DIR = PIN_OUTPUT;
WIFI_SPI_SS_PIN = 1;
WIFI_IRQ_PIN_DIR = PIN_INPUT;
// WIFI_SPI_CFG_PIN_DIR = PIN_OUTPUT;
// WIFI_SPI_CFG_PIN = 0;
WIFI_CHP_EN_PIN_DIR = PIN_OUTPUT;
WIFI_CHP_EN_PIN = 0;
WIFI_CHP_RST_PIN_DIR = PIN_OUTPUT;
WIFI_CHP_RST_PIN = 0;
//Wifi chip IRQ
IEC0bits.INT0IE = 0;
IFS0bits.INT0IF = 0;
INTCONbits.INT0EP = 0; //Falling edge
IPC0bits.INT0IP = 3;
IPC0bits.INT0IS = 0;
IEC0bits.INT0IE = 1;
//Wifi chip SPI
SPI2CON = 0;
SPI2CONbits.MSTEN = 1;
SPI2CONbits.CKE = 1;
SPI2CONbits.SMP = 0;
SPI2CONbits.CKP = 0;
SPI2BRG = SPICalculateBRG(PERIPHERAL_FREQ, 1000000);
// SPI2BRG = SPICalculateBRG(PERIPHERAL_FREQ, 50000);
SPI2CONbits.ON = 1;
//////////////// INVERTER RELAY //////////////////
//Chalet inverter power relay
POWER_RELAY_ON_PIN_DIR = PIN_OUTPUT;
POWER_RELAY_OFF_PIN_DIR = PIN_OUTPUT;
POWER_RELAY_ON_PIN = 0;
POWER_RELAY_OFF_PIN = 0;
//////////////// HARAKIRI RELAY //////////////////
//Harakiri relay
HARAKIRI_RELAY_ON_PIN_DIR = PIN_OUTPUT;
HARAKIRI_RELAY_ON_PIN= 0;
//12V presence detection input
CHALET_12V_PRESENCE_PIN_DIR = PIN_INPUT;
//////////////// BATTERY MONITOR //////////////////
//Battery voltage measurement (analog input)
BATTERY_VOLTAGE_ANALOG_PIN_DIR = PIN_INPUT;
//ADC Config
AD1PCFG = 0xFFFF; //Sart with I/O pins configured as digital I/O
AD1PCFGbits.PCFG1 = 0;
TRISBbits.TRISB1 = PIN_INPUT;
AD1CON1 = 0;
AD1CON2 = 0;
AD1CON3 = 0;
AD1CHS = 0;
AD1CHSbits.CH0SA = 1; //AN1
AD1CON3bits.ADCS = 0xF0;
AD1CON3bits.SAMC = 0x01;
AD1CON1bits.ON = 1;
AD1CON1bits.SAMP = 1;
//////////////// TEMPERATURE SENSOR //////////////////
//Onboard temperature sensor (SPI)
TEMP_SENSOR_CS_PIN_DIR = PIN_OUTPUT;
TEMP_SENSOR_CS_PIN = 1;
TEMP_SENSOR_SPI_SDO_PIN_DIR = PIN_OUTPUT;
TEMP_SENSOR_SPI_SDI_PIN_DIR = PIN_INPUT;
TEMP_SENSOR_SPI_SCK_PIN_DIR = PIN_OUTPUT;
SPI3CON = 0;
SPI3CONbits.MSTEN = 1;
SPI3CONbits.CKE = 1;
SPI3CONbits.SMP = 0;
SPI3CONbits.CKP = 0;
SPI3BRG = SPICalculateBRG(PERIPHERAL_FREQ, 1000000);
SPI3CONbits.ON = 1;
//////////////// CURRENT SENSOR //////////////////
//Analog (Hall effect) current sensor
CURRENT_SENSOR_IN1_PIN_DIR = PIN_INPUT; //AN2
CURRENT_SENSOR_IN2_PIN_DIR = PIN_INPUT; //AN0
//TODO
// AD1CHS = 0;
// AD1CHSbits.CH0SA = 1; //AN2
// AD1CON3bits.ADCS = 0xF0;
// AD1CON3bits.SAMC = 0x01;
// AD1CON1bits.ON = 1;
// AD1CON1bits.SAMP = 1;
//////////////// LORA //////////////////
LORA_MODULE_RELAY_PIN_DIR = PIN_OUTPUT;
LORA_MODULE_RELAY_PIN = 0;
// LORA_MODULE_M0_PIN_DIR = PIN_INPUT;
// LORA_MODULE_M0_PIN = 0;
// LORA_MODULE_M1_PIN_DIR = PIN_INPUT;
// LORA_MODULE_M1_PIN = 0;
LORA_MODULE_INT_PIN_DIR = PIN_INPUT;
LORA_MODULE_RX_LED_PIN_DIR = PIN_OUTPUT;
LORA_MODULE_RX_LED_PIN = LED_OFF;
LORA_MODULE_TX_LED_PIN_DIR = PIN_OUTPUT;
LORA_MODULE_TX_LED_PIN = LED_OFF;
//////////////// LCD SCREEN //////////////////
//LCD Screen
LCD_RS_PIN_DIR = PIN_OUTPUT;
LCD_RS_PIN = 0;
LCD_RW_PIN_DIR = PIN_OUTPUT;
LCD_RW_PIN = 0;
LCD_E_PIN_DIR = PIN_OUTPUT;
LCD_E_PIN = 0;
LCD_DB4_PIN_DIR = PIN_OUTPUT;
LCD_DB4_PIN = 0;
LCD_DB5_PIN_DIR = PIN_OUTPUT;
LCD_DB5_PIN = 0;
LCD_DB6_PIN_DIR = PIN_OUTPUT;
LCD_DB6_PIN = 0;
LCD_DB7_PIN_DIR = PIN_OUTPUT;
LCD_DB7_PIN = 0;
// LCD_SCROLL_BTN_PIN_DIR = PIN_INPUT;
////// MISC UNUSED STUFF ///////////
// IEC0bits.INT1IE = 0;
// IFS0bits.INT1IF = 0;
// INTCONbits.INT1EP = 1; //Rising edge
// IPC1bits.INT1IP = 2;
// IPC1bits.INT1IS = 1;
// IEC0bits.INT1IE = 1;
// OC3CON = 0;
// OC3R = 0;
// OC3RS = 2000; //50% PWM
// OC3CONbits.OCTSEL = 0;
// OC3CONbits.OCM = 0b110; //PWM mode, no fault protection
//#ifdef __32MX330F064H__
// RPD2Rbits.RPD2R = 0b1011; //RD2 peripheral selection = OC3
//#endif
//
// T2CONbits.TON = 0; // Disable Timer
// // T2CONbits.TCS = 0; // Select internal instruction cycle clock
// T2CONbits.TGATE = 0; // Disable Gated Timer mode
// T2CONbits.TCKPS = 0b011; // Select 1:1 Prescaler
// TMR2 = 0x00; // Clear timer register
//
//
// IPC2bits.T2IP = 0x01; // Set Timer 2 Interrupt Priority Level
// IFS0bits.T2IF = 0; // Clear Timer 2 Interrupt Flag
// IEC0bits.T2IE = 0; // Disable Timer 2 interrupt
// T2CONbits.TON = 1; // Start Timer
//
// OC3CONbits.ON = 1;
return RET_OK;
}

5
Bootloader_PIC32.X/Source/DigitalIO.c
View File

@ -38,6 +38,11 @@ void InitDigitalIO(void)
HEARTBEAT_LED_2_PIN = LED_OFF;
HEARTBEAT_LED_1_PIN = LED_OFF;
// SD_SPI_CS_PIN_DIR = PIN_OUTPUT;
// SD_SPI_CS_PIN = 1;
// SD_SPI_SDI_PIN_DIR = PIN_INPUT;

16
Bootloader_PIC32.X/Source/DigitalIO.h
View File

@ -40,8 +40,10 @@
#define HEARTBEAT_LED_2_PIN_DIR TRISEbits.TRISE6
#define HEARTBEAT_LED_2_PIN LATEbits.LATE6
#define SD_SPI_SDO_PIN_DIR TRISGbits.TRISG8
#define SD_SPI_CS_PIN_DIR TRISGbits.TRISG9
#define SD_SPI_CS_PIN LATGbits.LATG9
#define SD_SPI_CS_PIN_DIR TRISEbits.TRISE1
#define SD_SPI_CS_PIN LATEbits.LATE1
//#define SD_SPI_CS_PIN_DIR TRISGbits.TRISG9
//#define SD_SPI_CS_PIN LATGbits.LATG9
#define SD_SPI_SDI_PIN_DIR TRISGbits.TRISG7
#define SD_SPI_SCK_PIN_DIR TRISGbits.TRISG6
@ -52,11 +54,11 @@
#define PIN_OUTPUT 0
#define SD_SPI_SDO_PIN_DIR TRISGbits.TRISG8
#define SD_SPI_CS_PIN_DIR TRISGbits.TRISG9
#define SD_SPI_CS_PIN LATGbits.LATG9
#define SD_SPI_SDI_PIN_DIR TRISGbits.TRISG7
#define SD_SPI_SCK_PIN_DIR TRISGbits.TRISG6
//#define SD_SPI_SDO_PIN_DIR TRISGbits.TRISG8
//#define SD_SPI_CS_PIN_DIR TRISGbits.TRISG9
//#define SD_SPI_CS_PIN LATGbits.LATG9
//#define SD_SPI_SDI_PIN_DIR TRISGbits.TRISG7
//#define SD_SPI_SCK_PIN_DIR TRISGbits.TRISG6
/* ************************************************************************** */
/* Prototypes */

5
Bootloader_PIC32.X/Source/FatFS/ff.c
View File

@ -3198,7 +3198,10 @@ BYTE check_fs ( /* 0:FAT, 1:exFAT, 2:Valid BS but not FAT, 3:Not a BS, 4:Disk er
)
{
fs->wflag = 0; fs->winsect = 0xFFFFFFFF; /* Invaidate window */
if (move_window(fs, sect) != FR_OK) return 4; /* Load boot record */
if (move_window(fs, sect) != FR_OK)
{
return 4; /* Load boot record */
}
if (ld_word(fs->win + BS_55AA) != 0xAA55) return 3; /* Check boot record signature (always placed here even if the sector size is >512) */

6
Bootloader_PIC32.X/Source/FatFS/ffconf.h
View File

@ -15,7 +15,7 @@
/ and optional writing functions as well. */
#define FF_FS_MINIMIZE 0
#define FF_FS_MINIMIZE 3
/* This option defines minimization level to remove some basic API functions.
/
/ 0: Basic functions are fully enabled.
@ -217,7 +217,7 @@
/ System Configurations
/---------------------------------------------------------------------------*/
#define FF_FS_TINY 0
#define FF_FS_TINY 1
/* This option switches tiny buffer configuration. (0:Normal or 1:Tiny)
/ At the tiny configuration, size of file object (FIL) is shrinked FF_MAX_SS bytes.
/ Instead of private sector buffer eliminated from the file object, common sector
@ -233,7 +233,7 @@
#define FF_FS_NORTC 1
#define FF_NORTC_MON 1
#define FF_NORTC_MDAY 1
#define FF_NORTC_YEAR 2017
#define FF_NORTC_YEAR 2020
/* The option FF_FS_NORTC switches timestamp functiton. If the system does not have
/ any RTC function or valid timestamp is not needed, set FF_FS_NORTC = 1 to disable
/ the timestamp function. All objects modified by FatFs will have a fixed timestamp

5
Bootloader_PIC32.X/Source/FatFS/mmc_drv.c
View File

@ -131,7 +131,7 @@ static void set_fast_clk(void)
unsigned WasON = SPI2CONbits.ON;
SPI2CONbits.ON = 0;
SPI2BRG = SPICalculateBRG(80000000,20000000);
SPI2BRG = SPICalculateBRG(80000000,/*20000000*/200000);
SPI2CONbits.ON = WasON;
}
@ -144,6 +144,7 @@ static void set_fast_clk(void)
static BYTE xchg_spi (BYTE dat)
{
// CS_LOW();
#ifndef USE_PINGUINO
while( SPI2STATbits.SPITBF == 1 )
{
@ -152,12 +153,14 @@ static BYTE xchg_spi (BYTE dat)
// ----------------
// sending data
// ----------------
SPI2BUF = dat;
while(SPI2STATbits.SPIRBF == 0)
{
}
// CS_HIGH();
return (BYTE)SPI2BUF; /* Get received byte */
}

1
Bootloader_PIC32.X/Source/FlashInterface.c
View File

@ -14,6 +14,7 @@
#include "define.h"
#include "FlashInterface.h"
stDataSector_t CurrentDataSector;
void InitFlashInterface(void)
{

19
Bootloader_PIC32.X/Source/FlashInterface.h
View File

@ -4,19 +4,23 @@
#include "define.h" //for CPU selection
#define APPLICATION_START_ADDRESS 0x9D003000
#define APPLICATION_FLASH_START_ADDRESS 0x9D002000
//#define APPLICATION_START_ADDRESS 0x9D003000
//#define APPLICATION_FLASH_START_ADDRESS 0x9D002000
#define APPLICATION_START_ADDRESS 0x9D005000
#define APPLICATION_FLASH_START_ADDRESS 0x9D004000
#define FLASH_ROW_SIZE 128
#define FLASH_ROW_SIZE_IN_BYTES (4 * FLASH_ROW_SIZE) //512
#define FLASH_PAGE_SIZE (8 * FLASH_ROW_SIZE) //1024
#define FLASH_PAGE_SIZE_IN_BYTES (4 * FLASH_PAGE_SIZE) //4096
#define MAX_SECTOR_SIZE FLASH_PAGE_SIZE_IN_BYTES
//The number of pages of application program flash
#ifdef USE_675F512_CPU
#define FLASH_NB_APPLICATION_PAGES (0x40000 / FLASH_PAGE_SIZE_IN_BYTES) - 2 //0x40000 is the size of the flash (32MX675F512L), the 2 first pages are reserved for bootloader. (-2)
#else
#define FLASH_NB_APPLICATION_PAGES (0x80000 / FLASH_PAGE_SIZE_IN_BYTES) - 2 //0x80000 is the size of the flash (32MX795F512L), the 2 first pages are reserved for bootloader. (-2)
#define FLASH_NB_APPLICATION_PAGES (0x80000 / FLASH_PAGE_SIZE_IN_BYTES) - 4 //0x80000 is the size of the flash (32MX795F512L), the 2 first pages are reserved for bootloader. (-2)
#endif
@ -24,6 +28,14 @@
#define PROGRAM_FLASH_END_ADDRESS 0x1D07FFFF
typedef struct
{
unsigned int SectorStartAddress;
unsigned short SectorSize;
unsigned int SectorData[MAX_SECTOR_SIZE];
}stDataSector_t;
enum eFlashOperations
{
FLASH_NOP_CMD = 0X0000,
@ -39,6 +51,7 @@ enum eFlashReturnValues
FLASH_STATUS_ERROR
};
extern stDataSector_t CurrentDataSector;
void InitFlashInterface(void);
unsigned int FlashErase(void);

32
Bootloader_PIC32.X/Source/FlashMapping.h Normal file
View File

@ -0,0 +1,32 @@
/*
* File: ChaletPowerRelay.h
* Author: JF
*
* Created on November 30, 2018, 7:33 PM
*/
#ifndef FLASHMAPPING_H
#define FLASHMAPPING_H
#include "define.h"
/*
0x180000 Firmware flags
0x180004 Nb Records
0x180008 Firmware Size
0x18000C Version code
*/
#define FLASH_END_ADDRESS 180000
#define FLASH_BTLDR_FIRMWARE_START_ADDRESS 0x180000
#define FLASH_BTLDR_FIRMWARE_LAST_64K_SECTOR_ADD 0x1F0000
#define FLASH_BTLDR_FLAGS_ADDRESS 0x000000
#define FLASH_BTLDR_HEADER_SIZE 24
#define FLASH_BTLDR_FLAGS_SIZE 12
#endif /* HARAKIRIRELAY_H */

4
Bootloader_PIC32.X/Source/InternalUart.c
View File

@ -26,6 +26,7 @@
/* ************************************************************************** */
/* Includes */
#include "define.h"
#include "BoardCfg.h"
#include "InternalUart.h"
#include "uart.h"
#include "BootloaderProtocol.h"
@ -501,6 +502,7 @@ int SendInternalUartData(char *p_pcDataBuf, int p_iDataSize)
#ifdef USE_SERIAL_PORT_2
U2TXREG = *p_pcDataBuf++;
while(U2STAbits.TRMT == 0);
Nop();
#endif
@ -553,7 +555,7 @@ int ReadInternalUart(void)
while(U2STAbits.URXDA == 1)
{
byte = U2RXREG;
ProtocolRxData(byte);
// ProtocolRxData(byte);
count++;
}
#endif

11
Bootloader_PIC32.X/Source/SPI.c
View File

@ -1,17 +1,20 @@
#include "define.h"
#include "DigitalIO.h"
//#include "BoardCfg.h"
#include "SPI.h"
unsigned char SPITransaction(unsigned char OutBuf)
unsigned char SPITransaction(unsigned char OutBuf, unsigned char BaudRate)
{
WIFI_SPI_SS_PIN = 0;
SPI2BRG = BaudRate;
// WIFI_SPI_SS_PIN = 0;
SPI2BUF = OutBuf;
while(!SPI2STATbits.SPIRBF);
OutBuf = SPI2BUF;
WIFI_SPI_SS_PIN = 1;
// WIFI_SPI_SS_PIN = 1;
return OutBuf;
}

2
Bootloader_PIC32.X/Source/SPI.h
View File

@ -8,7 +8,7 @@
#ifndef SPI_H
#define SPI_H
unsigned char SPITransaction(unsigned char OutBuf);
unsigned char SPITransaction(unsigned char OutBuf, unsigned char Baudrate);
#endif /* SPI_H */

448
Bootloader_PIC32.X/Source/SPI_Flash.c Normal file
View File

@ -0,0 +1,448 @@
#include "SPI_Flash.h"
#include "SPI.h"
#include "BoardCfg.h"
unsigned char mSPIFlashBaudrate;
unsigned char mSPIFlashHighSpeedBaudrate;
unsigned char mFlashSectorBuffer[SPI_FLASH_SECTOR_SIZE];
int InitSPIFlash()
{
FLASH_SS_PIN = 1;
mSPIFlashBaudrate = SPICalculateBRG(PERIPHERAL_FREQ, 25000000);
// mSPIFlashHighSpeedBaudrate = SPICalculateBRG(PERIPHERAL_FREQ, 50000000);
mSPIFlashHighSpeedBaudrate = SPICalculateBRG(PERIPHERAL_FREQ, 35000000);
}
int SPIFlashCheckAndConfigure()
{
if(SPIFlashCheckChipID() == RET_OK)
{
SPIFlashWriteEnable();
FLASH_SS_PIN = 0;
SPITransaction(SPI_FLASH_WRITE_STATUS_REG,mSPIFlashHighSpeedBaudrate);
SPITransaction(0x00,mSPIFlashHighSpeedBaudrate); //Configure for write enable the whole memory
FLASH_SS_PIN = 1;
SPIFlashReadStatusReg(1);
// printf("SPI Flash configured\n");
char mbuf[30];
mbuf[0] = 'S';
mbuf[1] = 'P';
mbuf[2] = 'I';
mbuf[3] = ' ';
mbuf[4] = 'F';
mbuf[5] = 'l';
mbuf[6] = 'a';
mbuf[7] = 's';
mbuf[8] = 'h';
mbuf[9] = ' ';
mbuf[10] = 'C';
mbuf[11] = 'o';
mbuf[12] = 'n';
mbuf[13] = 'f';
mbuf[14] = 'i';
mbuf[15] = 'g';
mbuf[16] = 'u';
mbuf[17] = 'r';
mbuf[18] = 'e';
mbuf[19] = 'd';
mbuf[20] = '\n';
mbuf[21] = '\r';
SendInternalUartData(&mbuf[0],22);
return RET_OK;
}
// printf("ERROR: SPI Flash not detected\n");
return RET_ERROR;
}
int SPIFlashWriteEnable()
{
FLASH_SS_PIN = 0;
SPITransaction(SPI_FLASH_WRITE_ENABLE,mSPIFlashHighSpeedBaudrate);
FLASH_SS_PIN = 1;
return RET_OK;
}
unsigned char SPIFlashReadStatusReg(int print)
{
unsigned char result;
FLASH_SS_PIN = 0;
result = SPITransaction(SPI_FLASH_READ_STATUS_REG,mSPIFlashBaudrate);
result = SPITransaction(0x00,mSPIFlashBaudrate); //get data
FLASH_SS_PIN = 1;
if(print)
{
// printf("Flash status register : 0x%x\n",result);
}
return result;
}
int SPIFlashCheckBusy()
{
unsigned char status = SPIFlashReadStatusReg(0);
if((status & SPI_FLASH_BUSY_MASK) != 0)
{
return 1;
}
return 0;
}
int SPIFlashCheckChipID()
{
unsigned char VendorID, ChipID;
FLASH_SS_PIN = 0;
SPITransaction(SPI_FLASH_READ_ID,mSPIFlashBaudrate);
SPITransaction(0x00,mSPIFlashBaudrate);
SPITransaction(0x00,mSPIFlashBaudrate);
SPITransaction(0x00,mSPIFlashBaudrate); //Vendor address
VendorID = SPITransaction(0x00,mSPIFlashBaudrate); //Vendor ID, should be 0xBF
ChipID = SPITransaction(0x00,mSPIFlashBaudrate); //Device ID, should be 0x41
FLASH_SS_PIN = 1;
if(VendorID != SPI_FLASH_VENDOR_ID || ChipID != SPI_FLASH_CHIP_ID)
{
// printf("SPI Flash detection FAILED. Vendor: 0x%x, Chip ID: 0x%x\n",VendorID,ChipID);
return RET_ERROR;
}
// printf("SPI Flash detected. Vendor: 0x%x, Chip ID: 0x%x\n",VendorID,ChipID);
return RET_OK;
}
int SPIFlashReadBuffer(unsigned char *Buf, int Size, int StartAddress)
{
if(StartAddress + Size - 1 > SPI_FLASH_MAX_ADDRESS)
{
return RET_ERROR;
}
FLASH_SS_PIN = 0;
SPITransaction(SPI_FLASH_HI_SPEED_READ,mSPIFlashBaudrate);
SPITransaction(((StartAddress & 0xFF0000) >> 16),mSPIFlashHighSpeedBaudrate);
SPITransaction(((StartAddress & 0x00FF00) >> 8),mSPIFlashHighSpeedBaudrate);
SPITransaction((StartAddress & 0x0000FF),mSPIFlashHighSpeedBaudrate);
SPITransaction((0x00),mSPIFlashHighSpeedBaudrate); //Chip requires a dummy read in high speed
int i;
for(i = 0; i < Size; i++)
{
unsigned char tmp;
tmp =SPITransaction(0xDE,mSPIFlashHighSpeedBaudrate);
*Buf++ = tmp;
// *Buf++ = SPITransaction(0xDE,mSPIFlashHighSpeedBaudrate);
}
FLASH_SS_PIN = 1;
return RET_OK;
}
int SPIFlashEraseSector(int SectorAddress)
{
if(SectorAddress % SPI_FLASH_SECTOR_SIZE != 0) //Sectors are aligned on 0x1000
{
return RET_ERROR;
}
SPIFlashWriteEnable();
FLASH_SS_PIN = 0;
SPITransaction(SPI_FLASH_4KB_SECOTR_ERASE,mSPIFlashHighSpeedBaudrate);
SPITransaction(((SectorAddress & 0xFF0000) >> 16),mSPIFlashHighSpeedBaudrate);
SPITransaction(((SectorAddress & 0x00FF00) >> 8),mSPIFlashHighSpeedBaudrate);
SPITransaction((SectorAddress & 0x0000FF),mSPIFlashHighSpeedBaudrate);
FLASH_SS_PIN = 1;
SectorAddress++;
while( SPIFlashCheckBusy() == true);
//SPIFlashWriteEnable();
return RET_OK;
}
int SPIFlashErase64KSector(int SectorAddress, int Blocking)
{
if(SectorAddress % SPI_FLASH_64K_SECTOR_SIZE != 0) //Sectors are aligned on 0x1000
{
return RET_ERROR;
}
if((SectorAddress + SPI_FLASH_64K_SECTOR_SIZE - 1) > SPI_FLASH_MAX_ADDRESS)
{
return RET_ERROR;
}
SPIFlashWriteEnable();
FLASH_SS_PIN = 0;
SPITransaction(SPI_FLASH_64KB_BLOCK_ERASE,mSPIFlashHighSpeedBaudrate);
SPITransaction(((SectorAddress & 0xFF0000) >> 16),mSPIFlashHighSpeedBaudrate);
SPITransaction(((SectorAddress & 0x00FF00) >> 8),mSPIFlashHighSpeedBaudrate);
SPITransaction((SectorAddress & 0x0000FF),mSPIFlashHighSpeedBaudrate);
FLASH_SS_PIN = 1;
if(Blocking != 0)
{
while( SPIFlashCheckBusy() == true);
// SPIFlashWriteEnable();
}
return RET_OK;
}
int SPIFlashWriteSectorWorkingBuffer(int SectorAddress, int Erase)
{
if(SectorAddress % SPI_FLASH_SECTOR_SIZE != 0) //Sectors are aligned on 0x1000
{
return RET_ERROR;
}
if(Erase == 1)
{
SPIFlashEraseSector(SectorAddress);
}
unsigned char *DataPtr = &mFlashSectorBuffer[0];
int j;
for(j = 0; j < SPI_FLASH_SECTOR_SIZE; j++)
{
unsigned char curbyte;
curbyte = *DataPtr;
SPIFlashWriteEnable();
char Add1, Add2, Add3;
Add1 = (unsigned char)((SectorAddress & 0xFF0000) >> 16);
Add2 = ((unsigned char)((SectorAddress & 0x00FF00) >> 8));
Add3 = ((unsigned char)(SectorAddress & 0x0000FF));
int t;
t = 0;
FLASH_SS_PIN = 0;
SPITransaction(SPI_FLASH_BYTE_PROGRAM,mSPIFlashHighSpeedBaudrate);
// SPITransaction((unsigned char)((SectorAddress & 0xFF0000) >> 16),mSPIFlashHighSpeedBaudrate);
// SPITransaction((unsigned char)((SectorAddress & 0x00FF00) >> 8),mSPIFlashHighSpeedBaudrate);
// SPITransaction((unsigned char)(SectorAddress & 0x0000FF),mSPIFlashHighSpeedBaudrate);
SPITransaction(Add1,mSPIFlashHighSpeedBaudrate);
SPITransaction(Add2,mSPIFlashHighSpeedBaudrate);
SPITransaction(Add3,mSPIFlashHighSpeedBaudrate);
SPITransaction(curbyte,mSPIFlashHighSpeedBaudrate);
// SPITransaction(*DataPtr,mSPIFlashHighSpeedBaudrate);
FLASH_SS_PIN = 1;
DataPtr++;
SectorAddress++;
while( SPIFlashCheckBusy() == true);
}
return RET_OK;
}
int SPIFlashWriteByte(unsigned int ByteAddress, char byte, int blocking)
{
if(ByteAddress > SPI_FLASH_MAX_ADDRESS)
{
return RET_ERROR;
}
SPIFlashWriteEnable();
FLASH_SS_PIN = 0;
SPITransaction(SPI_FLASH_BYTE_PROGRAM,mSPIFlashHighSpeedBaudrate);
SPITransaction(((ByteAddress & 0xFF0000) >> 16),mSPIFlashHighSpeedBaudrate);
SPITransaction(((ByteAddress & 0x00FF00) >> 8),mSPIFlashHighSpeedBaudrate);
SPITransaction((ByteAddress & 0x0000FF),mSPIFlashHighSpeedBaudrate);
SPITransaction(byte,mSPIFlashHighSpeedBaudrate);
FLASH_SS_PIN = 1;
if(blocking)
{
while( SPIFlashCheckBusy() == true);
}
return RET_OK;
}
//int SPIFlashEraseSectorForWrite(unsigned char StartAddress, int Size)
//{
// //First, let's determine which sector to erase.
//
// int NbSectors = 1;
// int FirstSector = StartAddress / 0x1000;
// int LastSector = (StartAddress + Size) / 0x1000;
//
// if(LastSector > FirstSector)
// {
// NbSectors = LastSector - FirstSector;
// }
//
// int i;
// for(i = FirstSector; i < LastSector; i++ ) //Erase each sector one by one
// {
//
// }
//
//}
//int SPIFlashWriteBuffer(unsigned char *Buf, int Size, int StartAddress)
//{
// //First, we need to determine if the data overlaps or uses more than one sector
// //First, let's determine which sector to erase.
// int EndAddress = StartAddress + Size - 1;
// if(EndAddress > SPI_FLASH_MAX_ADDRESS)
// {
// return RET_ERROR;
// }
//
// int NbSectors = 1;
// int FirstSector = StartAddress / SPI_FLASH_SECTOR_SIZE;
// int LastSector = EndAddress / SPI_FLASH_SECTOR_SIZE;
//
// if(LastSector > FirstSector)
// {
// NbSectors = LastSector - FirstSector + 1;
// }
//
// int i;
// int FlashAddress = StartAddress;
// int CurSector = FirstSector;
// for(i = 0; i < NbSectors; i++ ) //Read, erase and write each sector one by one
// {
// //first we need to backup the data outside our buffer.
// //TODO: optimize
// int SectorStartAddress = CurSector++ * SPI_FLASH_SECTOR_SIZE;
// int SectorEndAddress = SectorStartAddress + SPI_FLASH_SECTOR_SIZE - 1;
// if(SectorEndAddress > EndAddress)
// {
// SectorEndAddress = EndAddress;
// }
//
// SPIFlashReadBuffer(mFlashSectorBuffer,SPI_FLASH_SECTOR_SIZE,SectorStartAddress); //Get local RAM buffer of the sector
//
// //Update the data to write.
// int RAMAddress = FlashAddress - SectorStartAddress;
// int RAMSectorSize = SectorEndAddress - FlashAddress + 1;
// FlashAddress += RAMSectorSize;
//
// unsigned char* RAMPtr = &mFlashSectorBuffer[RAMAddress];
// int j;
// for(j = 0; j < RAMSectorSize; j++)
// {
// *RAMPtr++ = *Buf++;
// }
//
// int SectorAddress = SectorStartAddress;
// RAMPtr = mFlashSectorBuffer;
//
// for(j = 0; j < SPI_FLASH_SECTOR_SIZE; j++)
// {
// SPIFlashWriteEnable();
//
// FLASH_SS_PIN = 0;
// SPITransaction(SPI_FLASH_BYTE_PROGRAM,mSPIFlashHighSpeedBaudrate);
// SPITransaction(((SectorAddress & 0xFF0000) >> 16),mSPIFlashBaudrate);
// SPITransaction(((SectorAddress & 0x00FF00) >> 8),mSPIFlashBaudrate);
// SPITransaction((SectorAddress & 0x0000FF),mSPIFlashBaudrate);
// SPITransaction(*RAMPtr++,mSPIFlashBaudrate);
// FLASH_SS_PIN = 1;
//
// SectorAddress++;
//
// while( SPIFlashCheckBusy() == true);
// }
// }
//}
int SPIFlashWriteBuffer(unsigned char *Buf, int Size, int StartAddress)
{
int CurDataFlashAddress, DataFlashEndAddress;
char *DataBufPtr, *WorkPagePtr;
int WriteFinished;
//Init stuff
WriteFinished = 0;
DataFlashEndAddress = StartAddress + Size; //Start + size means the data at "DataFlashEndAddress" should not be written.
CurDataFlashAddress = StartAddress;
DataBufPtr = Buf;
if(DataFlashEndAddress > SPI_FLASH_MAX_ADDRESS)
{
return RET_ERROR;
}
while(WriteFinished == 0)
{
//Determine the current sector start address.
int SectorStartAddress;
SectorStartAddress = ((CurDataFlashAddress / SPI_FLASH_SECTOR_SIZE) * SPI_FLASH_SECTOR_SIZE); //Weird but it works
//Load the sector in RAM working buffer
if(SPIFlashReadBuffer(mFlashSectorBuffer,SPI_FLASH_SECTOR_SIZE,SectorStartAddress) != RET_OK)
{
return RET_ERROR;
}
//Set the working buffer pointer to the right value.
WorkPagePtr = &mFlashSectorBuffer[CurDataFlashAddress - SectorStartAddress];
//Modify the working buffer with data to write.
int SectorFinished = 0;
while(SectorFinished == 0)
{
*WorkPagePtr++ = *DataBufPtr++;
CurDataFlashAddress++;
//Are we at the end of the buffer to write?
if(CurDataFlashAddress == DataFlashEndAddress)
{
SectorFinished = 1;
WriteFinished = 1;
// SPIFlashEraseSector(SectorStartAddress);
SPIFlashWriteSectorWorkingBuffer(SectorStartAddress,1);
break;
}
else if(CurDataFlashAddress % SPI_FLASH_SECTOR_SIZE == 0) //Are we at the beginning of the next sector?
{
SectorFinished = 1;
// SPIFlashEraseSector(SectorStartAddress);
SPIFlashWriteSectorWorkingBuffer(SectorStartAddress,1);
break;
}
}
}
return 1;
}

48
Bootloader_PIC32.X/Source/SPI_Flash.h Normal file
View File

@ -0,0 +1,48 @@
#ifndef SPI_FLASH_H /* Guard against multiple inclusion */
#define SPI_FLASH_H
#define SPI_FLASH_READ 0x03
#define SPI_FLASH_HI_SPEED_READ 0x0b
#define SPI_FLASH_4KB_SECOTR_ERASE 0x20
#define SPI_FLASH_32KB_BLOCK_ERASE 0x52
#define SPI_FLASH_64KB_BLOCK_ERASE 0xd8
#define SPI_FLASH_CHIP_ERASE 0x60
#define SPI_FLASH_BYTE_PROGRAM 0x02
#define SPI_FLASH_AAI_WORD_PROGRAM 0xad
#define SPI_FLASH_READ_STATUS_REG 0x05
#define SPI_FLASH_ENABLE_WRITE_STATUS_REG 0x50
#define SPI_FLASH_WRITE_STATUS_REG 0x01
#define SPI_FLASH_WRITE_ENABLE 0x06
#define SPI_FLASH_WRITE_DISABLE 0x04
#define SPI_FLASH_READ_ID 0x90
#define SPI_FLASH_READ_JEDEC_ID 0x9f
#define SPI_FLASH_ENABLE_SO_BUSY 0x70
#define SPI_FLASH_DISABLE_SO_BUSY 0x80
#define SPI_FLASH_BUSY_MASK 0x01
#define SPI_FLASH_VENDOR_ID 0xBF
#define SPI_FLASH_CHIP_ID 0x41
#define SPI_FLASH_MAX_ADDRESS 0x1FFFFF
#define SPI_FLASH_SECTOR_SIZE 0x1000
#define SPI_FLASH_64K_SECTOR_SIZE 0x10000
#define SPI_NB_SECTORS 0x1FF //511 sectors = SPI_FLASH_MAX_ADDRESS / SPI_FLASH_SECTOR_SIZE
int InitSPIFlash();
int SPIFlashCheckChipID();
unsigned char SPIFlashReadStatusReg(int print);
int SPIFlashCheckAndConfigure();
int SPIFlashReadBuffer(unsigned char *Buf, int Size, int StartAddress);
int SPIFlashCheckBusy();
int SPIFlashWriteEnable();
int SPIFlashEraseSector(int SectorAddress);
int SPIFlashErase64KSector(int SectorAddress, int Blocking);
int SPIFlashWriteSectorWorkingBuffer(int SectorAddress, int Erase);
int SPIFlashWriteBuffer(unsigned char *Buf, int Size, int StartAddress);
int SPIFlashWriteByte(unsigned int ByteAddress, char byte, int blocking);
#endif /* SPI_FLASH_H */

94
Bootloader_PIC32.X/Source/checksum.h Normal file
View File

@ -0,0 +1,94 @@
/*
* Library: libcrc
* File: include/checksum.h
* Author: Lammert Bies
*
* This file is licensed under the MIT License as stated below
*
* Copyright (c) 1999-2016 Lammert Bies
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
* Description
* -----------
* The headerfile include/checksum.h contains the definitions and prototypes
* for routines that can be used to calculate several kinds of checksums.
*/
#ifndef DEF_LIBCRC_CHECKSUM_H
#define DEF_LIBCRC_CHECKSUM_H
#include <stdint.h>
/*
* #define CRC_POLY_xxxx
*
* The constants of the form CRC_POLY_xxxx define the polynomials for some well
* known CRC calculations.
*/
#define CRC_POLY_16 0xA001
#define CRC_POLY_32 0xEDB88320L
#define CRC_POLY_CCITT 0x1021
#define CRC_POLY_DNP 0xA6BC
#define CRC_POLY_KERMIT 0x8408
#define CRC_POLY_SICK 0x8005
/*
* #define CRC_START_xxxx
*
* The constants of the form CRC_START_xxxx define the values that are used for
* initialization of a CRC value for common used calculation methods.
*/
#define CRC_START_8 0x00
#define CRC_START_16 0x0000
#define CRC_START_MODBUS 0xFFFF
#define CRC_START_XMODEM 0x0000
#define CRC_START_CCITT_1D0F 0x1D0F
#define CRC_START_CCITT_FFFF 0xFFFF
#define CRC_START_KERMIT 0x0000
#define CRC_START_SICK 0x0000
#define CRC_START_DNP 0x0000
#define CRC_START_32 0xFFFFFFFFL
/*
* Prototype list of global functions
*/
unsigned char * checksum_NMEA( const unsigned char *input_str, unsigned char *result );
uint8_t crc_8( const unsigned char *input_str, size_t num_bytes );
uint16_t crc_16( const unsigned char *input_str, size_t num_bytes );
uint32_t crc_32( const unsigned char *input_str, size_t num_bytes );
uint16_t crc_ccitt_1d0f( const unsigned char *input_str, size_t num_bytes );
uint16_t crc_ccitt_ffff( const unsigned char *input_str, size_t num_bytes );
uint16_t crc_dnp( const unsigned char *input_str, size_t num_bytes );
uint16_t crc_kermit( const unsigned char *input_str, size_t num_bytes );
uint16_t crc_modbus( const unsigned char *input_str, size_t num_bytes );
uint16_t crc_sick( const unsigned char *input_str, size_t num_bytes );
uint16_t crc_xmodem( const unsigned char *input_str, size_t num_bytes );
uint8_t update_crc_8( uint8_t crc, unsigned char c );
uint16_t update_crc_16( uint16_t crc, unsigned char c );
uint32_t update_crc_32( uint32_t crc, unsigned char c );
uint16_t update_crc_ccitt( uint16_t crc, unsigned char c );
uint16_t update_crc_dnp( uint16_t crc, unsigned char c );
uint16_t update_crc_kermit( uint16_t crc, unsigned char c );
uint16_t update_crc_sick( uint16_t crc, unsigned char c, unsigned char prev_byte );
#endif // DEF_LIBCRC_CHECKSUM_H

131
Bootloader_PIC32.X/Source/crc32.c Normal file
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@ -0,0 +1,131 @@
/*
* Library: libcrc
* File: src/crc32.c
* Author: Lammert Bies
*
* This file is licensed under the MIT License as stated below
*
* Copyright (c) 1999-2016 Lammert Bies
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
* Description
* -----------
* The source file src/crc32.c contains the routines which are needed to
* calculate a 32 bit CRC value of a sequence of bytes.
*/
#include <stdbool.h>
#include <stdlib.h>
#include "checksum.h"
static void init_crc32_tab( void );
static bool crc_tab32_init = false;
static uint32_t crc_tab32[256];
/*
* uint32_t crc_32( const unsigned char *input_str, size_t num_bytes );
*
* The function crc_32() calculates in one pass the common 32 bit CRC value for
* a byte string that is passed to the function together with a parameter
* indicating the length.
*/
uint32_t crc_32( const unsigned char *input_str, size_t num_bytes ) {
uint32_t crc;
uint32_t tmp;
uint32_t long_c;
const unsigned char *ptr;
size_t a;
if ( ! crc_tab32_init ) init_crc32_tab();
crc = CRC_START_32;
ptr = input_str;
if ( ptr != NULL ) for (a=0; a<num_bytes; a++) {
long_c = 0x000000FFL & (uint32_t) *ptr;
tmp = crc ^ long_c;
crc = (crc >> 8) ^ crc_tab32[ tmp & 0xff ];
ptr++;
}
crc ^= 0xffffffffL;
return crc & 0xffffffffL;
} /* crc_32 */
/*
* uint32_t update_crc_32( uint32_t crc, unsigned char c );
*
* The function update_crc_32() calculates a new CRC-32 value based on the
* previous value of the CRC and the next byte of the data to be checked.
*/
uint32_t update_crc_32( uint32_t crc, unsigned char c ) {
uint32_t tmp;
uint32_t long_c;
long_c = 0x000000ffL & (uint32_t) c;
if ( ! crc_tab32_init ) init_crc32_tab();
tmp = crc ^ long_c;
crc = (crc >> 8) ^ crc_tab32[ tmp & 0xff ];
return crc & 0xffffffffL;;
} /* update_crc_32 */
/*
* static void init_crc32_tab( void );
*
* For optimal speed, the CRC32 calculation uses a table with pre-calculated
* bit patterns which are used in the XOR operations in the program. This table
* is generated once, the first time the CRC update routine is called.
*/
static void init_crc32_tab( void ) {
uint32_t i;
uint32_t j;
uint32_t crc;
for (i=0; i<256; i++) {
crc = i;
for (j=0; j<8; j++) {
if ( crc & 0x00000001L ) crc = ( crc >> 1 ) ^ CRC_POLY_32;
else crc = crc >> 1;
}
crc_tab32[i] = crc;
}
crc_tab32_init = true;
} /* init_crc32_tab */

8
Bootloader_PIC32.X/Source/define.h
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@ -26,8 +26,8 @@
/* ************************************************************************** */
/* Defines */
#define SYS_FREQ (77824000L)
#define PERIPHERAL_FREQ (77824000L)
//#define SYS_FREQ (77824000L)
//#define PERIPHERAL_FREQ (77824000L)
#define PIN_INPUT 1
#define PIN_OUTPUT 0
#define false 0
@ -36,8 +36,10 @@
#define LSB8(x) (x & 0xFF)
#define USE_BLOCKING_PRINTF
#define NO_EXTERNAL_UART
#define LED_ON 0
#define LED_OFF 1
#define USE_675F512_CPU //For prototype board, 795F512 CPUs were backordered.
//#define USE_675F512_CPU //For prototype board, 795F512 CPUs were backordered.
/* ************************************************************************** */
/* Type definitions */

84
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@ -10,11 +10,15 @@
*******************************************************************************/
#include "define.h"
#include "BoardCfg.h"
#include "InternalUart.h"
#include "FlashInterface.h"
#include "BootloaderProtocol.h"
#include "BootloaderStateMachine.h"
#include "BootloaderInterface.h"
#include "DigitalIO.h"
#include "SPI_Flash.h"
//#include "FatFS/ff.h"
//#pragma config FMIIEN = OFF, FSRSSEL = PRIORITY_7, FETHIO = ON
//#pragma config FPLLMUL = MUL_20, FPLLIDIV = DIV_2, FPLLODIV = DIV_1, FWDTEN = OFF
@ -30,16 +34,27 @@
//#pragma config ICESEL = ICS_PGx1, BWP = ON
#pragma config FPLLMUL = MUL_20, FPLLIDIV = DIV_2, FPLLODIV = DIV_1, FWDTEN = OFF, WDTPS = PS128
//#pragma config FPLLMUL = MUL_20, FPLLIDIV = DIV_2, FPLLODIV = DIV_1, FWDTEN = OFF, WDTPS = PS128
//#pragma config POSCMOD = EC, FNOSC = PRIPLL, FPBDIV = DIV_1
//#pragma config POSCMOD = XT, FNOSC = PRIPLL, FPBDIV = DIV_1
//#pragma config ICESEL = ICS_PGx2, BWP = OFF
#pragma config FPLLMUL = MUL_20, FPLLIDIV = DIV_2, FPLLODIV = DIV_1, FWDTEN = OFF, WDTPS = PS4096 //Watchdog timeout = 4,096s
#pragma config POSCMOD = EC, FNOSC = PRIPLL, FPBDIV = DIV_1
//#pragma config POSCMOD = XT, FNOSC = PRIPLL, FPBDIV = DIV_1
#pragma config ICESEL = ICS_PGx2, BWP = OFF
#pragma config FSOSCEN = OFF
//void _general_exception_handler(void);
void _general_exception_handler(void);
int main(void)
{
// FATFS fs;
// FRESULT fr;
// FIL fil;
char RdBuf[256];
unsigned int rd,wr;
@ -48,19 +63,45 @@ int main(void)
// INTConfigureSystem(INT_SYSTEM_CONFIG_MULT_VECTOR);// configure for multi-vectored mode interrupts
AD1PCFG = 0xFFFF; //Sart with I/O pins configured as digital I/O
InitBoard();
InternalUartInit();
InitFlashInterface();
ProtocolInit();
// ProtocolInit();
BootloaderSMInit();
InitDigitalIO();
OpenInternalPort(0,0,115200,INT_UART_ONE_STOP_BIT,INT_UART_NO_PARITY);
OpenInternalPort(0,0,9600,INT_UART_ONE_STOP_BIT,INT_UART_NO_PARITY);
InitSPIFlash();
if(SPIFlashCheckAndConfigure() == RET_OK)
{
BootloaderSMSetSPIFlashDetected(RET_OK);
}
else
{
BootloaderSMSetSPIFlashDetected(RET_ERROR);
}
// fr = f_mount(&fs,"",1);
// fr = f_open(&fil,"JF.txt",FA_READ | FA_WRITE | FA_OPEN_ALWAYS);
// if(fr == FR_OK)
// {
// fr = f_read(&fil,RdBuf,100,&rd);
// fr = f_write(&fil,RdBuf,rd,&wr);
// }
// else
// {
// int toto = 0xDEADBEEF;
// }
// f_close(&fil);
ProtocolSendCmd(BOOTLOADER_READY_CMD,0,0);
// ProtocolSendCmd(BOOTLOADER_READY_CMD,0,0);
HEARTBEAT_LED_1_PIN = 0;
char mbuf[30];
char mbuf[30];
mbuf[0] = 'B';
mbuf[1] = 'o';
mbuf[2] = 'o';
@ -77,8 +118,11 @@ int main(void)
mbuf[13] = '.';
mbuf[14] = '0';
mbuf[15] = '1';
mbuf[16] = '\r';
SendInternalUartData(&mbuf[0],17);
mbuf[16] = '\n';
mbuf[17] = '\r';
SendInternalUartData(&mbuf[0],18);
int i,j;
i =0;
@ -93,17 +137,17 @@ int main(void)
// could flash a led
HEARTBEAT_LED_2_PIN = !HEARTBEAT_LED_2_PIN;
}
if(e_CommandPending)
{
//Valid command received.
ProtocolExecCmd();
e_CommandPending = false;
}
//
// if(e_CommandPending)
// {
// //Valid command received.
// ProtocolExecCmd();
// e_CommandPending = false;
// }
//
BootloaderSM(SM_TICK_EVENT,SM_NULL_DATA);
if(++i >= 100000)
if(++i >= 30000)
{
// if(++j >= 10000000)
{
@ -148,7 +192,9 @@ void _general_exception_handler(void)
mbuf[18] = '\r';
SendInternalUartData(&mbuf[0],19);
SoftReset();
SoftReset();
while(1);
}

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6
Bootloader_PIC32.X/build/ChaletDuino_795/production/Source/BootloaderProtocol.o.d
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@ -1,6 +0,0 @@
build/ChaletDuino_795/production/Source/BootloaderProtocol.o: \
Source/BootloaderProtocol.c \
Source/define.h \
Source/BootloaderProtocol.h \
Source/BootloaderStateMachine.h \
Source/internaluart.h

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4
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@ -4,4 +4,6 @@ Source/define.h \
Source/BootloaderStateMachine.h \
Source/FlashInterface.h \
Source/BootloaderProtocol.h \
Source/InternalUart.h
Source/InternalUart.h \
Source/BootloaderInterface.h \
Source/FlashMapping.h

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6
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@ -1,6 +0,0 @@
build/ChaletDuino_795/production/Source/FatFS/ff.o: \
Source/FatFS/ff.c \
Source/FatFS/ff.h \
Source/FatFS/integer.h \
Source/FatFS/ffconf.h \
Source/FatFS/diskio.h

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5
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@ -1,5 +0,0 @@
build/ChaletDuino_795/production/Source/FatFS/ffsystem.o: \
Source/FatFS/ffsystem.c \
Source/FatFS/ff.h \
Source/FatFS/integer.h \
Source/FatFS/ffconf.h

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@ -1,5 +0,0 @@
build/ChaletDuino_795/production/Source/FatFS/ffunicode.o: \
Source/FatFS/ffunicode.c \
Source/FatFS/ff.h \
Source/FatFS/integer.h \
Source/FatFS/ffconf.h

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Bootloader_PIC32.X/build/ChaletDuino_795/production/Source/FatFS/mmc_drv.o.d
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@ -1,5 +0,0 @@
build/ChaletDuino_795/production/Source/FatFS/mmc_drv.o: \
Source/FatFS/mmc_drv.c \
Source/DigitalIO.h \
Source/FatFS/diskio.h \
Source/FatFS/integer.h

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6
Bootloader_PIC32.X/build/ChaletDuino_795/production/Source/InternalUart.o.d
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@ -1,6 +1,8 @@
build/ChaletDuino_795/production/Source/InternalUart.o: \
Source/InternalUart.c \
Source/define.h \
Source/BoardCfg.h \
Source/BoardCfg_ChaletduinoV2.h \
Source/InternalUart.h \
Source/uart.h \
Source/BootloaderProtocol.h
Source/uart.h \
Source/BootloaderProtocol.h

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Bootloader_PIC32.X/build/ChaletDuino_795/production/Source/main.o.d
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@ -1,8 +1,12 @@
build/ChaletDuino_795/production/Source/main.o: \
Source/main.c \
Source/define.h \
Source/InternalUart.h \
Source/BoardCfg.h \
Source/BoardCfg_ChaletduinoV2.h \
Source/InternalUart.h \
Source/FlashInterface.h \
Source/BootloaderProtocol.h \
Source/BootloaderStateMachine.h \
Source/DigitalIO.h
Source/BootloaderInterface.h \
Source/DigitalIO.h \
Source/SPI_Flash.h

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154
Bootloader_PIC32.X/nbproject/Makefile-ChaletDuino_795.mk
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@ -57,17 +57,17 @@ OBJECTDIR=build/${CND_CONF}/${IMAGE_TYPE}
DISTDIR=dist/${CND_CONF}/${IMAGE_TYPE}
# Source Files Quoted if spaced
SOURCEFILES_QUOTED_IF_SPACED=Source/BootloaderProtocol.c Source/BootloaderStateMachine.c Source/DigitalIO.c Source/FlashInterface.c Source/InternalUart.c Source/main.c Source/FatFS/ff.c Source/FatFS/ffsystem.c Source/FatFS/ffunicode.c Source/FatFS/mmc_drv.c
SOURCEFILES_QUOTED_IF_SPACED=Source/BootloaderStateMachine.c Source/DigitalIO.c Source/FlashInterface.c Source/InternalUart.c Source/main.c Source/SPI.c Source/SPI_Flash.c Source/ChaletduinoV2Board.c Source/BootloaderInterface.c Source/crc32.c
# Object Files Quoted if spaced
OBJECTFILES_QUOTED_IF_SPACED=${OBJECTDIR}/Source/BootloaderProtocol.o ${OBJECTDIR}/Source/BootloaderStateMachine.o ${OBJECTDIR}/Source/DigitalIO.o ${OBJECTDIR}/Source/FlashInterface.o ${OBJECTDIR}/Source/InternalUart.o ${OBJECTDIR}/Source/main.o ${OBJECTDIR}/Source/FatFS/ff.o ${OBJECTDIR}/Source/FatFS/ffsystem.o ${OBJECTDIR}/Source/FatFS/ffunicode.o ${OBJECTDIR}/Source/FatFS/mmc_drv.o
POSSIBLE_DEPFILES=${OBJECTDIR}/Source/BootloaderProtocol.o.d ${OBJECTDIR}/Source/BootloaderStateMachine.o.d ${OBJECTDIR}/Source/DigitalIO.o.d ${OBJECTDIR}/Source/FlashInterface.o.d ${OBJECTDIR}/Source/InternalUart.o.d ${OBJECTDIR}/Source/main.o.d ${OBJECTDIR}/Source/FatFS/ff.o.d ${OBJECTDIR}/Source/FatFS/ffsystem.o.d ${OBJECTDIR}/Source/FatFS/ffunicode.o.d ${OBJECTDIR}/Source/FatFS/mmc_drv.o.d
OBJECTFILES_QUOTED_IF_SPACED=${OBJECTDIR}/Source/BootloaderStateMachine.o ${OBJECTDIR}/Source/DigitalIO.o ${OBJECTDIR}/Source/FlashInterface.o ${OBJECTDIR}/Source/InternalUart.o ${OBJECTDIR}/Source/main.o ${OBJECTDIR}/Source/SPI.o ${OBJECTDIR}/Source/SPI_Flash.o ${OBJECTDIR}/Source/ChaletduinoV2Board.o ${OBJECTDIR}/Source/BootloaderInterface.o ${OBJECTDIR}/Source/crc32.o
POSSIBLE_DEPFILES=${OBJECTDIR}/Source/BootloaderStateMachine.o.d ${OBJECTDIR}/Source/DigitalIO.o.d ${OBJECTDIR}/Source/FlashInterface.o.d ${OBJECTDIR}/Source/InternalUart.o.d ${OBJECTDIR}/Source/main.o.d ${OBJECTDIR}/Source/SPI.o.d ${OBJECTDIR}/Source/SPI_Flash.o.d ${OBJECTDIR}/Source/ChaletduinoV2Board.o.d ${OBJECTDIR}/Source/BootloaderInterface.o.d ${OBJECTDIR}/Source/crc32.o.d
# Object Files
OBJECTFILES=${OBJECTDIR}/Source/BootloaderProtocol.o ${OBJECTDIR}/Source/BootloaderStateMachine.o ${OBJECTDIR}/Source/DigitalIO.o ${OBJECTDIR}/Source/FlashInterface.o ${OBJECTDIR}/Source/InternalUart.o ${OBJECTDIR}/Source/main.o ${OBJECTDIR}/Source/FatFS/ff.o ${OBJECTDIR}/Source/FatFS/ffsystem.o ${OBJECTDIR}/Source/FatFS/ffunicode.o ${OBJECTDIR}/Source/FatFS/mmc_drv.o
OBJECTFILES=${OBJECTDIR}/Source/BootloaderStateMachine.o ${OBJECTDIR}/Source/DigitalIO.o ${OBJECTDIR}/Source/FlashInterface.o ${OBJECTDIR}/Source/InternalUart.o ${OBJECTDIR}/Source/main.o ${OBJECTDIR}/Source/SPI.o ${OBJECTDIR}/Source/SPI_Flash.o ${OBJECTDIR}/Source/ChaletduinoV2Board.o ${OBJECTDIR}/Source/BootloaderInterface.o ${OBJECTDIR}/Source/crc32.o
# Source Files
SOURCEFILES=Source/BootloaderProtocol.c Source/BootloaderStateMachine.c Source/DigitalIO.c Source/FlashInterface.c Source/InternalUart.c Source/main.c Source/FatFS/ff.c Source/FatFS/ffsystem.c Source/FatFS/ffunicode.c Source/FatFS/mmc_drv.c
SOURCEFILES=Source/BootloaderStateMachine.c Source/DigitalIO.c Source/FlashInterface.c Source/InternalUart.c Source/main.c Source/SPI.c Source/SPI_Flash.c Source/ChaletduinoV2Board.c Source/BootloaderInterface.c Source/crc32.c
@ -107,146 +107,146 @@ endif
# ------------------------------------------------------------------------------------
# Rules for buildStep: compile
ifeq ($(TYPE_IMAGE), DEBUG_RUN)
${OBJECTDIR}/Source/BootloaderProtocol.o: Source/BootloaderProtocol.c nbproject/Makefile-${CND_CONF}.mk
@${MKDIR} "${OBJECTDIR}/Source"
@${RM} ${OBJECTDIR}/Source/BootloaderProtocol.o.d
@${RM} ${OBJECTDIR}/Source/BootloaderProtocol.o
${MP_CC} $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_ICD3=1 -fframe-base-loclist -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -I"Source" -I"Source/thinfat32/src/include" -D_SUPPRESS_PLIB_WARNING -MMD -MF "${OBJECTDIR}/Source/BootloaderProtocol.o.d" -o ${OBJECTDIR}/Source/BootloaderProtocol.o Source/BootloaderProtocol.c -DXPRJ_ChaletDuino_795=$(CND_CONF) -legacy-libc $(COMPARISON_BUILD)
@${FIXDEPS} "${OBJECTDIR}/Source/BootloaderProtocol.o.d" $(SILENT) -rsi ${MP_CC_DIR}../
${OBJECTDIR}/Source/BootloaderStateMachine.o: Source/BootloaderStateMachine.c nbproject/Makefile-${CND_CONF}.mk
@${MKDIR} "${OBJECTDIR}/Source"
@${RM} ${OBJECTDIR}/Source/BootloaderStateMachine.o.d
@${RM} ${OBJECTDIR}/Source/BootloaderStateMachine.o
${MP_CC} $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_ICD3=1 -fframe-base-loclist -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -I"Source" -I"Source/thinfat32/src/include" -D_SUPPRESS_PLIB_WARNING -MMD -MF "${OBJECTDIR}/Source/BootloaderStateMachine.o.d" -o ${OBJECTDIR}/Source/BootloaderStateMachine.o Source/BootloaderStateMachine.c -DXPRJ_ChaletDuino_795=$(CND_CONF) -legacy-libc $(COMPARISON_BUILD)
${MP_CC} $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_ICD3=1 -fframe-base-loclist -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -I"Source" -I"Source/thinfat32/src/include" -fno-schedule-insns -fno-schedule-insns2 -D_SUPPRESS_PLIB_WARNING -DCHALETDUINO_V2_BRD -MMD -MF "${OBJECTDIR}/Source/BootloaderStateMachine.o.d" -o ${OBJECTDIR}/Source/BootloaderStateMachine.o Source/BootloaderStateMachine.c -DXPRJ_ChaletDuino_795=$(CND_CONF) -legacy-libc $(COMPARISON_BUILD)
@${FIXDEPS} "${OBJECTDIR}/Source/BootloaderStateMachine.o.d" $(SILENT) -rsi ${MP_CC_DIR}../
${OBJECTDIR}/Source/DigitalIO.o: Source/DigitalIO.c nbproject/Makefile-${CND_CONF}.mk
@${MKDIR} "${OBJECTDIR}/Source"
@${RM} ${OBJECTDIR}/Source/DigitalIO.o.d
@${RM} ${OBJECTDIR}/Source/DigitalIO.o
${MP_CC} $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_ICD3=1 -fframe-base-loclist -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -I"Source" -I"Source/thinfat32/src/include" -D_SUPPRESS_PLIB_WARNING -MMD -MF "${OBJECTDIR}/Source/DigitalIO.o.d" -o ${OBJECTDIR}/Source/DigitalIO.o Source/DigitalIO.c -DXPRJ_ChaletDuino_795=$(CND_CONF) -legacy-libc $(COMPARISON_BUILD)
${MP_CC} $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_ICD3=1 -fframe-base-loclist -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -I"Source" -I"Source/thinfat32/src/include" -fno-schedule-insns -fno-schedule-insns2 -D_SUPPRESS_PLIB_WARNING -DCHALETDUINO_V2_BRD -MMD -MF "${OBJECTDIR}/Source/DigitalIO.o.d" -o ${OBJECTDIR}/Source/DigitalIO.o Source/DigitalIO.c -DXPRJ_ChaletDuino_795=$(CND_CONF) -legacy-libc $(COMPARISON_BUILD)
@${FIXDEPS} "${OBJECTDIR}/Source/DigitalIO.o.d" $(SILENT) -rsi ${MP_CC_DIR}../
${OBJECTDIR}/Source/FlashInterface.o: Source/FlashInterface.c nbproject/Makefile-${CND_CONF}.mk
@${MKDIR} "${OBJECTDIR}/Source"
@${RM} ${OBJECTDIR}/Source/FlashInterface.o.d
@${RM} ${OBJECTDIR}/Source/FlashInterface.o
${MP_CC} $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_ICD3=1 -fframe-base-loclist -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -I"Source" -I"Source/thinfat32/src/include" -D_SUPPRESS_PLIB_WARNING -MMD -MF "${OBJECTDIR}/Source/FlashInterface.o.d" -o ${OBJECTDIR}/Source/FlashInterface.o Source/FlashInterface.c -DXPRJ_ChaletDuino_795=$(CND_CONF) -legacy-libc $(COMPARISON_BUILD)
${MP_CC} $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_ICD3=1 -fframe-base-loclist -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -I"Source" -I"Source/thinfat32/src/include" -fno-schedule-insns -fno-schedule-insns2 -D_SUPPRESS_PLIB_WARNING -DCHALETDUINO_V2_BRD -MMD -MF "${OBJECTDIR}/Source/FlashInterface.o.d" -o ${OBJECTDIR}/Source/FlashInterface.o Source/FlashInterface.c -DXPRJ_ChaletDuino_795=$(CND_CONF) -legacy-libc $(COMPARISON_BUILD)
@${FIXDEPS} "${OBJECTDIR}/Source/FlashInterface.o.d" $(SILENT) -rsi ${MP_CC_DIR}../
${OBJECTDIR}/Source/InternalUart.o: Source/InternalUart.c nbproject/Makefile-${CND_CONF}.mk
@${MKDIR} "${OBJECTDIR}/Source"
@${RM} ${OBJECTDIR}/Source/InternalUart.o.d
@${RM} ${OBJECTDIR}/Source/InternalUart.o
${MP_CC} $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_ICD3=1 -fframe-base-loclist -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -I"Source" -I"Source/thinfat32/src/include" -D_SUPPRESS_PLIB_WARNING -MMD -MF "${OBJECTDIR}/Source/InternalUart.o.d" -o ${OBJECTDIR}/Source/InternalUart.o Source/InternalUart.c -DXPRJ_ChaletDuino_795=$(CND_CONF) -legacy-libc $(COMPARISON_BUILD)
${MP_CC} $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_ICD3=1 -fframe-base-loclist -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -I"Source" -I"Source/thinfat32/src/include" -fno-schedule-insns -fno-schedule-insns2 -D_SUPPRESS_PLIB_WARNING -DCHALETDUINO_V2_BRD -MMD -MF "${OBJECTDIR}/Source/InternalUart.o.d" -o ${OBJECTDIR}/Source/InternalUart.o Source/InternalUart.c -DXPRJ_ChaletDuino_795=$(CND_CONF) -legacy-libc $(COMPARISON_BUILD)
@${FIXDEPS} "${OBJECTDIR}/Source/InternalUart.o.d" $(SILENT) -rsi ${MP_CC_DIR}../
${OBJECTDIR}/Source/main.o: Source/main.c nbproject/Makefile-${CND_CONF}.mk
@${MKDIR} "${OBJECTDIR}/Source"
@${RM} ${OBJECTDIR}/Source/main.o.d
@${RM} ${OBJECTDIR}/Source/main.o
${MP_CC} $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_ICD3=1 -fframe-base-loclist -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -I"Source" -I"Source/thinfat32/src/include" -D_SUPPRESS_PLIB_WARNING -MMD -MF "${OBJECTDIR}/Source/main.o.d" -o ${OBJECTDIR}/Source/main.o Source/main.c -DXPRJ_ChaletDuino_795=$(CND_CONF) -legacy-libc $(COMPARISON_BUILD)
${MP_CC} $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_ICD3=1 -fframe-base-loclist -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -I"Source" -I"Source/thinfat32/src/include" -fno-schedule-insns -fno-schedule-insns2 -D_SUPPRESS_PLIB_WARNING -DCHALETDUINO_V2_BRD -MMD -MF "${OBJECTDIR}/Source/main.o.d" -o ${OBJECTDIR}/Source/main.o Source/main.c -DXPRJ_ChaletDuino_795=$(CND_CONF) -legacy-libc $(COMPARISON_BUILD)
@${FIXDEPS} "${OBJECTDIR}/Source/main.o.d" $(SILENT) -rsi ${MP_CC_DIR}../
${OBJECTDIR}/Source/FatFS/ff.o: Source/FatFS/ff.c nbproject/Makefile-${CND_CONF}.mk
@${MKDIR} "${OBJECTDIR}/Source/FatFS"
@${RM} ${OBJECTDIR}/Source/FatFS/ff.o.d
@${RM} ${OBJECTDIR}/Source/FatFS/ff.o
${MP_CC} $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_ICD3=1 -fframe-base-loclist -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -I"Source" -I"Source/thinfat32/src/include" -D_SUPPRESS_PLIB_WARNING -MMD -MF "${OBJECTDIR}/Source/FatFS/ff.o.d" -o ${OBJECTDIR}/Source/FatFS/ff.o Source/FatFS/ff.c -DXPRJ_ChaletDuino_795=$(CND_CONF) -legacy-libc $(COMPARISON_BUILD)
@${FIXDEPS} "${OBJECTDIR}/Source/FatFS/ff.o.d" $(SILENT) -rsi ${MP_CC_DIR}../
${OBJECTDIR}/Source/SPI.o: Source/SPI.c nbproject/Makefile-${CND_CONF}.mk
@${MKDIR} "${OBJECTDIR}/Source"
@${RM} ${OBJECTDIR}/Source/SPI.o.d
@${RM} ${OBJECTDIR}/Source/SPI.o
${MP_CC} $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_ICD3=1 -fframe-base-loclist -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -I"Source" -I"Source/thinfat32/src/include" -fno-schedule-insns -fno-schedule-insns2 -D_SUPPRESS_PLIB_WARNING -DCHALETDUINO_V2_BRD -MMD -MF "${OBJECTDIR}/Source/SPI.o.d" -o ${OBJECTDIR}/Source/SPI.o Source/SPI.c -DXPRJ_ChaletDuino_795=$(CND_CONF) -legacy-libc $(COMPARISON_BUILD)
@${FIXDEPS} "${OBJECTDIR}/Source/SPI.o.d" $(SILENT) -rsi ${MP_CC_DIR}../
${OBJECTDIR}/Source/FatFS/ffsystem.o: Source/FatFS/ffsystem.c nbproject/Makefile-${CND_CONF}.mk
@${MKDIR} "${OBJECTDIR}/Source/FatFS"
@${RM} ${OBJECTDIR}/Source/FatFS/ffsystem.o.d
@${RM} ${OBJECTDIR}/Source/FatFS/ffsystem.o
${MP_CC} $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_ICD3=1 -fframe-base-loclist -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -I"Source" -I"Source/thinfat32/src/include" -D_SUPPRESS_PLIB_WARNING -MMD -MF "${OBJECTDIR}/Source/FatFS/ffsystem.o.d" -o ${OBJECTDIR}/Source/FatFS/ffsystem.o Source/FatFS/ffsystem.c -DXPRJ_ChaletDuino_795=$(CND_CONF) -legacy-libc $(COMPARISON_BUILD)
@${FIXDEPS} "${OBJECTDIR}/Source/FatFS/ffsystem.o.d" $(SILENT) -rsi ${MP_CC_DIR}../
${OBJECTDIR}/Source/SPI_Flash.o: Source/SPI_Flash.c nbproject/Makefile-${CND_CONF}.mk
@${MKDIR} "${OBJECTDIR}/Source"
@${RM} ${OBJECTDIR}/Source/SPI_Flash.o.d
@${RM} ${OBJECTDIR}/Source/SPI_Flash.o
${MP_CC} $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_ICD3=1 -fframe-base-loclist -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -I"Source" -I"Source/thinfat32/src/include" -fno-schedule-insns -fno-schedule-insns2 -D_SUPPRESS_PLIB_WARNING -DCHALETDUINO_V2_BRD -MMD -MF "${OBJECTDIR}/Source/SPI_Flash.o.d" -o ${OBJECTDIR}/Source/SPI_Flash.o Source/SPI_Flash.c -DXPRJ_ChaletDuino_795=$(CND_CONF) -legacy-libc $(COMPARISON_BUILD)
@${FIXDEPS} "${OBJECTDIR}/Source/SPI_Flash.o.d" $(SILENT) -rsi ${MP_CC_DIR}../
${OBJECTDIR}/Source/FatFS/ffunicode.o: Source/FatFS/ffunicode.c nbproject/Makefile-${CND_CONF}.mk
@${MKDIR} "${OBJECTDIR}/Source/FatFS"
@${RM} ${OBJECTDIR}/Source/FatFS/ffunicode.o.d
@${RM} ${OBJECTDIR}/Source/FatFS/ffunicode.o
${MP_CC} $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_ICD3=1 -fframe-base-loclist -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -I"Source" -I"Source/thinfat32/src/include" -D_SUPPRESS_PLIB_WARNING -MMD -MF "${OBJECTDIR}/Source/FatFS/ffunicode.o.d" -o ${OBJECTDIR}/Source/FatFS/ffunicode.o Source/FatFS/ffunicode.c -DXPRJ_ChaletDuino_795=$(CND_CONF) -legacy-libc $(COMPARISON_BUILD)
@${FIXDEPS} "${OBJECTDIR}/Source/FatFS/ffunicode.o.d" $(SILENT) -rsi ${MP_CC_DIR}../
${OBJECTDIR}/Source/ChaletduinoV2Board.o: Source/ChaletduinoV2Board.c nbproject/Makefile-${CND_CONF}.mk
@${MKDIR} "${OBJECTDIR}/Source"
@${RM} ${OBJECTDIR}/Source/ChaletduinoV2Board.o.d
@${RM} ${OBJECTDIR}/Source/ChaletduinoV2Board.o
${MP_CC} $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_ICD3=1 -fframe-base-loclist -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -I"Source" -I"Source/thinfat32/src/include" -fno-schedule-insns -fno-schedule-insns2 -D_SUPPRESS_PLIB_WARNING -DCHALETDUINO_V2_BRD -MMD -MF "${OBJECTDIR}/Source/ChaletduinoV2Board.o.d" -o ${OBJECTDIR}/Source/ChaletduinoV2Board.o Source/ChaletduinoV2Board.c -DXPRJ_ChaletDuino_795=$(CND_CONF) -legacy-libc $(COMPARISON_BUILD)
@${FIXDEPS} "${OBJECTDIR}/Source/ChaletduinoV2Board.o.d" $(SILENT) -rsi ${MP_CC_DIR}../
${OBJECTDIR}/Source/FatFS/mmc_drv.o: Source/FatFS/mmc_drv.c nbproject/Makefile-${CND_CONF}.mk
@${MKDIR} "${OBJECTDIR}/Source/FatFS"
@${RM} ${OBJECTDIR}/Source/FatFS/mmc_drv.o.d
@${RM} ${OBJECTDIR}/Source/FatFS/mmc_drv.o
${MP_CC} $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_ICD3=1 -fframe-base-loclist -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -I"Source" -I"Source/thinfat32/src/include" -D_SUPPRESS_PLIB_WARNING -MMD -MF "${OBJECTDIR}/Source/FatFS/mmc_drv.o.d" -o ${OBJECTDIR}/Source/FatFS/mmc_drv.o Source/FatFS/mmc_drv.c -DXPRJ_ChaletDuino_795=$(CND_CONF) -legacy-libc $(COMPARISON_BUILD)
@${FIXDEPS} "${OBJECTDIR}/Source/FatFS/mmc_drv.o.d" $(SILENT) -rsi ${MP_CC_DIR}../
${OBJECTDIR}/Source/BootloaderInterface.o: Source/BootloaderInterface.c nbproject/Makefile-${CND_CONF}.mk
@${MKDIR} "${OBJECTDIR}/Source"
@${RM} ${OBJECTDIR}/Source/BootloaderInterface.o.d
@${RM} ${OBJECTDIR}/Source/BootloaderInterface.o
${MP_CC} $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_ICD3=1 -fframe-base-loclist -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -I"Source" -I"Source/thinfat32/src/include" -fno-schedule-insns -fno-schedule-insns2 -D_SUPPRESS_PLIB_WARNING -DCHALETDUINO_V2_BRD -MMD -MF "${OBJECTDIR}/Source/BootloaderInterface.o.d" -o ${OBJECTDIR}/Source/BootloaderInterface.o Source/BootloaderInterface.c -DXPRJ_ChaletDuino_795=$(CND_CONF) -legacy-libc $(COMPARISON_BUILD)
@${FIXDEPS} "${OBJECTDIR}/Source/BootloaderInterface.o.d" $(SILENT) -rsi ${MP_CC_DIR}../
${OBJECTDIR}/Source/crc32.o: Source/crc32.c nbproject/Makefile-${CND_CONF}.mk
@${MKDIR} "${OBJECTDIR}/Source"
@${RM} ${OBJECTDIR}/Source/crc32.o.d
@${RM} ${OBJECTDIR}/Source/crc32.o
${MP_CC} $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_ICD3=1 -fframe-base-loclist -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -I"Source" -I"Source/thinfat32/src/include" -fno-schedule-insns -fno-schedule-insns2 -D_SUPPRESS_PLIB_WARNING -DCHALETDUINO_V2_BRD -MMD -MF "${OBJECTDIR}/Source/crc32.o.d" -o ${OBJECTDIR}/Source/crc32.o Source/crc32.c -DXPRJ_ChaletDuino_795=$(CND_CONF) -legacy-libc $(COMPARISON_BUILD)
@${FIXDEPS} "${OBJECTDIR}/Source/crc32.o.d" $(SILENT) -rsi ${MP_CC_DIR}../
else
${OBJECTDIR}/Source/BootloaderProtocol.o: Source/BootloaderProtocol.c nbproject/Makefile-${CND_CONF}.mk
@${MKDIR} "${OBJECTDIR}/Source"
@${RM} ${OBJECTDIR}/Source/BootloaderProtocol.o.d
@${RM} ${OBJECTDIR}/Source/BootloaderProtocol.o
${MP_CC} $(MP_EXTRA_CC_PRE) -g -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -I"Source" -I"Source/thinfat32/src/include" -D_SUPPRESS_PLIB_WARNING -MMD -MF "${OBJECTDIR}/Source/BootloaderProtocol.o.d" -o ${OBJECTDIR}/Source/BootloaderProtocol.o Source/BootloaderProtocol.c -DXPRJ_ChaletDuino_795=$(CND_CONF) -legacy-libc $(COMPARISON_BUILD)
@${FIXDEPS} "${OBJECTDIR}/Source/BootloaderProtocol.o.d" $(SILENT) -rsi ${MP_CC_DIR}../
${OBJECTDIR}/Source/BootloaderStateMachine.o: Source/BootloaderStateMachine.c nbproject/Makefile-${CND_CONF}.mk
@${MKDIR} "${OBJECTDIR}/Source"
@${RM} ${OBJECTDIR}/Source/BootloaderStateMachine.o.d
@${RM} ${OBJECTDIR}/Source/BootloaderStateMachine.o
${MP_CC} $(MP_EXTRA_CC_PRE) -g -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -I"Source" -I"Source/thinfat32/src/include" -D_SUPPRESS_PLIB_WARNING -MMD -MF "${OBJECTDIR}/Source/BootloaderStateMachine.o.d" -o ${OBJECTDIR}/Source/BootloaderStateMachine.o Source/BootloaderStateMachine.c -DXPRJ_ChaletDuino_795=$(CND_CONF) -legacy-libc $(COMPARISON_BUILD)
${MP_CC} $(MP_EXTRA_CC_PRE) -g -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -I"Source" -I"Source/thinfat32/src/include" -fno-schedule-insns -fno-schedule-insns2 -D_SUPPRESS_PLIB_WARNING -DCHALETDUINO_V2_BRD -MMD -MF "${OBJECTDIR}/Source/BootloaderStateMachine.o.d" -o ${OBJECTDIR}/Source/BootloaderStateMachine.o Source/BootloaderStateMachine.c -DXPRJ_ChaletDuino_795=$(CND_CONF) -legacy-libc $(COMPARISON_BUILD)
@${FIXDEPS} "${OBJECTDIR}/Source/BootloaderStateMachine.o.d" $(SILENT) -rsi ${MP_CC_DIR}../
${OBJECTDIR}/Source/DigitalIO.o: Source/DigitalIO.c nbproject/Makefile-${CND_CONF}.mk
@${MKDIR} "${OBJECTDIR}/Source"
@${RM} ${OBJECTDIR}/Source/DigitalIO.o.d
@${RM} ${OBJECTDIR}/Source/DigitalIO.o
${MP_CC} $(MP_EXTRA_CC_PRE) -g -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -I"Source" -I"Source/thinfat32/src/include" -D_SUPPRESS_PLIB_WARNING -MMD -MF "${OBJECTDIR}/Source/DigitalIO.o.d" -o ${OBJECTDIR}/Source/DigitalIO.o Source/DigitalIO.c -DXPRJ_ChaletDuino_795=$(CND_CONF) -legacy-libc $(COMPARISON_BUILD)
${MP_CC} $(MP_EXTRA_CC_PRE) -g -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -I"Source" -I"Source/thinfat32/src/include" -fno-schedule-insns -fno-schedule-insns2 -D_SUPPRESS_PLIB_WARNING -DCHALETDUINO_V2_BRD -MMD -MF "${OBJECTDIR}/Source/DigitalIO.o.d" -o ${OBJECTDIR}/Source/DigitalIO.o Source/DigitalIO.c -DXPRJ_ChaletDuino_795=$(CND_CONF) -legacy-libc $(COMPARISON_BUILD)
@${FIXDEPS} "${OBJECTDIR}/Source/DigitalIO.o.d" $(SILENT) -rsi ${MP_CC_DIR}../
${OBJECTDIR}/Source/FlashInterface.o: Source/FlashInterface.c nbproject/Makefile-${CND_CONF}.mk
@${MKDIR} "${OBJECTDIR}/Source"
@${RM} ${OBJECTDIR}/Source/FlashInterface.o.d
@${RM} ${OBJECTDIR}/Source/FlashInterface.o
${MP_CC} $(MP_EXTRA_CC_PRE) -g -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -I"Source" -I"Source/thinfat32/src/include" -D_SUPPRESS_PLIB_WARNING -MMD -MF "${OBJECTDIR}/Source/FlashInterface.o.d" -o ${OBJECTDIR}/Source/FlashInterface.o Source/FlashInterface.c -DXPRJ_ChaletDuino_795=$(CND_CONF) -legacy-libc $(COMPARISON_BUILD)
${MP_CC} $(MP_EXTRA_CC_PRE) -g -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -I"Source" -I"Source/thinfat32/src/include" -fno-schedule-insns -fno-schedule-insns2 -D_SUPPRESS_PLIB_WARNING -DCHALETDUINO_V2_BRD -MMD -MF "${OBJECTDIR}/Source/FlashInterface.o.d" -o ${OBJECTDIR}/Source/FlashInterface.o Source/FlashInterface.c -DXPRJ_ChaletDuino_795=$(CND_CONF) -legacy-libc $(COMPARISON_BUILD)
@${FIXDEPS} "${OBJECTDIR}/Source/FlashInterface.o.d" $(SILENT) -rsi ${MP_CC_DIR}../
${OBJECTDIR}/Source/InternalUart.o: Source/InternalUart.c nbproject/Makefile-${CND_CONF}.mk
@${MKDIR} "${OBJECTDIR}/Source"
@${RM} ${OBJECTDIR}/Source/InternalUart.o.d
@${RM} ${OBJECTDIR}/Source/InternalUart.o
${MP_CC} $(MP_EXTRA_CC_PRE) -g -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -I"Source" -I"Source/thinfat32/src/include" -D_SUPPRESS_PLIB_WARNING -MMD -MF "${OBJECTDIR}/Source/InternalUart.o.d" -o ${OBJECTDIR}/Source/InternalUart.o Source/InternalUart.c -DXPRJ_ChaletDuino_795=$(CND_CONF) -legacy-libc $(COMPARISON_BUILD)
${MP_CC} $(MP_EXTRA_CC_PRE) -g -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -I"Source" -I"Source/thinfat32/src/include" -fno-schedule-insns -fno-schedule-insns2 -D_SUPPRESS_PLIB_WARNING -DCHALETDUINO_V2_BRD -MMD -MF "${OBJECTDIR}/Source/InternalUart.o.d" -o ${OBJECTDIR}/Source/InternalUart.o Source/InternalUart.c -DXPRJ_ChaletDuino_795=$(CND_CONF) -legacy-libc $(COMPARISON_BUILD)
@${FIXDEPS} "${OBJECTDIR}/Source/InternalUart.o.d" $(SILENT) -rsi ${MP_CC_DIR}../
${OBJECTDIR}/Source/main.o: Source/main.c nbproject/Makefile-${CND_CONF}.mk
@${MKDIR} "${OBJECTDIR}/Source"
@${RM} ${OBJECTDIR}/Source/main.o.d
@${RM} ${OBJECTDIR}/Source/main.o
${MP_CC} $(MP_EXTRA_CC_PRE) -g -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -I"Source" -I"Source/thinfat32/src/include" -D_SUPPRESS_PLIB_WARNING -MMD -MF "${OBJECTDIR}/Source/main.o.d" -o ${OBJECTDIR}/Source/main.o Source/main.c -DXPRJ_ChaletDuino_795=$(CND_CONF) -legacy-libc $(COMPARISON_BUILD)
${MP_CC} $(MP_EXTRA_CC_PRE) -g -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -I"Source" -I"Source/thinfat32/src/include" -fno-schedule-insns -fno-schedule-insns2 -D_SUPPRESS_PLIB_WARNING -DCHALETDUINO_V2_BRD -MMD -MF "${OBJECTDIR}/Source/main.o.d" -o ${OBJECTDIR}/Source/main.o Source/main.c -DXPRJ_ChaletDuino_795=$(CND_CONF) -legacy-libc $(COMPARISON_BUILD)
@${FIXDEPS} "${OBJECTDIR}/Source/main.o.d" $(SILENT) -rsi ${MP_CC_DIR}../
${OBJECTDIR}/Source/FatFS/ff.o: Source/FatFS/ff.c nbproject/Makefile-${CND_CONF}.mk
@${MKDIR} "${OBJECTDIR}/Source/FatFS"
@${RM} ${OBJECTDIR}/Source/FatFS/ff.o.d
@${RM} ${OBJECTDIR}/Source/FatFS/ff.o
${MP_CC} $(MP_EXTRA_CC_PRE) -g -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -I"Source" -I"Source/thinfat32/src/include" -D_SUPPRESS_PLIB_WARNING -MMD -MF "${OBJECTDIR}/Source/FatFS/ff.o.d" -o ${OBJECTDIR}/Source/FatFS/ff.o Source/FatFS/ff.c -DXPRJ_ChaletDuino_795=$(CND_CONF) -legacy-libc $(COMPARISON_BUILD)
@${FIXDEPS} "${OBJECTDIR}/Source/FatFS/ff.o.d" $(SILENT) -rsi ${MP_CC_DIR}../
${OBJECTDIR}/Source/SPI.o: Source/SPI.c nbproject/Makefile-${CND_CONF}.mk
@${MKDIR} "${OBJECTDIR}/Source"
@${RM} ${OBJECTDIR}/Source/SPI.o.d
@${RM} ${OBJECTDIR}/Source/SPI.o
${MP_CC} $(MP_EXTRA_CC_PRE) -g -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -I"Source" -I"Source/thinfat32/src/include" -fno-schedule-insns -fno-schedule-insns2 -D_SUPPRESS_PLIB_WARNING -DCHALETDUINO_V2_BRD -MMD -MF "${OBJECTDIR}/Source/SPI.o.d" -o ${OBJECTDIR}/Source/SPI.o Source/SPI.c -DXPRJ_ChaletDuino_795=$(CND_CONF) -legacy-libc $(COMPARISON_BUILD)
@${FIXDEPS} "${OBJECTDIR}/Source/SPI.o.d" $(SILENT) -rsi ${MP_CC_DIR}../
${OBJECTDIR}/Source/FatFS/ffsystem.o: Source/FatFS/ffsystem.c nbproject/Makefile-${CND_CONF}.mk
@${MKDIR} "${OBJECTDIR}/Source/FatFS"
@${RM} ${OBJECTDIR}/Source/FatFS/ffsystem.o.d
@${RM} ${OBJECTDIR}/Source/FatFS/ffsystem.o
${MP_CC} $(MP_EXTRA_CC_PRE) -g -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -I"Source" -I"Source/thinfat32/src/include" -D_SUPPRESS_PLIB_WARNING -MMD -MF "${OBJECTDIR}/Source/FatFS/ffsystem.o.d" -o ${OBJECTDIR}/Source/FatFS/ffsystem.o Source/FatFS/ffsystem.c -DXPRJ_ChaletDuino_795=$(CND_CONF) -legacy-libc $(COMPARISON_BUILD)
@${FIXDEPS} "${OBJECTDIR}/Source/FatFS/ffsystem.o.d" $(SILENT) -rsi ${MP_CC_DIR}../
${OBJECTDIR}/Source/SPI_Flash.o: Source/SPI_Flash.c nbproject/Makefile-${CND_CONF}.mk
@${MKDIR} "${OBJECTDIR}/Source"
@${RM} ${OBJECTDIR}/Source/SPI_Flash.o.d
@${RM} ${OBJECTDIR}/Source/SPI_Flash.o
${MP_CC} $(MP_EXTRA_CC_PRE) -g -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -I"Source" -I"Source/thinfat32/src/include" -fno-schedule-insns -fno-schedule-insns2 -D_SUPPRESS_PLIB_WARNING -DCHALETDUINO_V2_BRD -MMD -MF "${OBJECTDIR}/Source/SPI_Flash.o.d" -o ${OBJECTDIR}/Source/SPI_Flash.o Source/SPI_Flash.c -DXPRJ_ChaletDuino_795=$(CND_CONF) -legacy-libc $(COMPARISON_BUILD)
@${FIXDEPS} "${OBJECTDIR}/Source/SPI_Flash.o.d" $(SILENT) -rsi ${MP_CC_DIR}../
${OBJECTDIR}/Source/FatFS/ffunicode.o: Source/FatFS/ffunicode.c nbproject/Makefile-${CND_CONF}.mk
@${MKDIR} "${OBJECTDIR}/Source/FatFS"
@${RM} ${OBJECTDIR}/Source/FatFS/ffunicode.o.d
@${RM} ${OBJECTDIR}/Source/FatFS/ffunicode.o
${MP_CC} $(MP_EXTRA_CC_PRE) -g -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -I"Source" -I"Source/thinfat32/src/include" -D_SUPPRESS_PLIB_WARNING -MMD -MF "${OBJECTDIR}/Source/FatFS/ffunicode.o.d" -o ${OBJECTDIR}/Source/FatFS/ffunicode.o Source/FatFS/ffunicode.c -DXPRJ_ChaletDuino_795=$(CND_CONF) -legacy-libc $(COMPARISON_BUILD)
@${FIXDEPS} "${OBJECTDIR}/Source/FatFS/ffunicode.o.d" $(SILENT) -rsi ${MP_CC_DIR}../
${OBJECTDIR}/Source/ChaletduinoV2Board.o: Source/ChaletduinoV2Board.c nbproject/Makefile-${CND_CONF}.mk
@${MKDIR} "${OBJECTDIR}/Source"
@${RM} ${OBJECTDIR}/Source/ChaletduinoV2Board.o.d
@${RM} ${OBJECTDIR}/Source/ChaletduinoV2Board.o
${MP_CC} $(MP_EXTRA_CC_PRE) -g -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -I"Source" -I"Source/thinfat32/src/include" -fno-schedule-insns -fno-schedule-insns2 -D_SUPPRESS_PLIB_WARNING -DCHALETDUINO_V2_BRD -MMD -MF "${OBJECTDIR}/Source/ChaletduinoV2Board.o.d" -o ${OBJECTDIR}/Source/ChaletduinoV2Board.o Source/ChaletduinoV2Board.c -DXPRJ_ChaletDuino_795=$(CND_CONF) -legacy-libc $(COMPARISON_BUILD)
@${FIXDEPS} "${OBJECTDIR}/Source/ChaletduinoV2Board.o.d" $(SILENT) -rsi ${MP_CC_DIR}../
${OBJECTDIR}/Source/FatFS/mmc_drv.o: Source/FatFS/mmc_drv.c nbproject/Makefile-${CND_CONF}.mk
@${MKDIR} "${OBJECTDIR}/Source/FatFS"
@${RM} ${OBJECTDIR}/Source/FatFS/mmc_drv.o.d
@${RM} ${OBJECTDIR}/Source/FatFS/mmc_drv.o
${MP_CC} $(MP_EXTRA_CC_PRE) -g -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -I"Source" -I"Source/thinfat32/src/include" -D_SUPPRESS_PLIB_WARNING -MMD -MF "${OBJECTDIR}/Source/FatFS/mmc_drv.o.d" -o ${OBJECTDIR}/Source/FatFS/mmc_drv.o Source/FatFS/mmc_drv.c -DXPRJ_ChaletDuino_795=$(CND_CONF) -legacy-libc $(COMPARISON_BUILD)
@${FIXDEPS} "${OBJECTDIR}/Source/FatFS/mmc_drv.o.d" $(SILENT) -rsi ${MP_CC_DIR}../
${OBJECTDIR}/Source/BootloaderInterface.o: Source/BootloaderInterface.c nbproject/Makefile-${CND_CONF}.mk
@${MKDIR} "${OBJECTDIR}/Source"
@${RM} ${OBJECTDIR}/Source/BootloaderInterface.o.d
@${RM} ${OBJECTDIR}/Source/BootloaderInterface.o
${MP_CC} $(MP_EXTRA_CC_PRE) -g -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -I"Source" -I"Source/thinfat32/src/include" -fno-schedule-insns -fno-schedule-insns2 -D_SUPPRESS_PLIB_WARNING -DCHALETDUINO_V2_BRD -MMD -MF "${OBJECTDIR}/Source/BootloaderInterface.o.d" -o ${OBJECTDIR}/Source/BootloaderInterface.o Source/BootloaderInterface.c -DXPRJ_ChaletDuino_795=$(CND_CONF) -legacy-libc $(COMPARISON_BUILD)
@${FIXDEPS} "${OBJECTDIR}/Source/BootloaderInterface.o.d" $(SILENT) -rsi ${MP_CC_DIR}../
${OBJECTDIR}/Source/crc32.o: Source/crc32.c nbproject/Makefile-${CND_CONF}.mk
@${MKDIR} "${OBJECTDIR}/Source"
@${RM} ${OBJECTDIR}/Source/crc32.o.d
@${RM} ${OBJECTDIR}/Source/crc32.o
${MP_CC} $(MP_EXTRA_CC_PRE) -g -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -I"Source" -I"Source/thinfat32/src/include" -fno-schedule-insns -fno-schedule-insns2 -D_SUPPRESS_PLIB_WARNING -DCHALETDUINO_V2_BRD -MMD -MF "${OBJECTDIR}/Source/crc32.o.d" -o ${OBJECTDIR}/Source/crc32.o Source/crc32.c -DXPRJ_ChaletDuino_795=$(CND_CONF) -legacy-libc $(COMPARISON_BUILD)
@${FIXDEPS} "${OBJECTDIR}/Source/crc32.o.d" $(SILENT) -rsi ${MP_CC_DIR}../
endif

4
Bootloader_PIC32.X/nbproject/Makefile-genesis.properties
View File

@ -1,12 +1,12 @@
#
#Sun Nov 15 16:21:42 EST 2020
#Mon Sep 20 13:22:54 EDT 2021
default.languagetoolchain.version=2.41
default.Pack.dfplocation=C\:\\Program Files (x86)\\Microchip\\MPLABX\\v5.40\\packs\\Microchip\\PIC32MX_DFP\\1.3.231
ChaletDuino_795.languagetoolchain.dir=C\:\\Program Files\\Microchip\\xc32\\v1.33\\bin
ChaletDuino_795.Pack.dfplocation=C\:\\Users\\JF\\.mchp_packs\\Microchip\\PIC32MX_DFP\\1.2.228
conf.ids=default,ChaletDuino_795
default.languagetoolchain.dir=C\:\\Program Files\\Microchip\\xc32\\v2.41\\bin
configurations-xml=02fe631ea05cd15722bbc09551659ffd
configurations-xml=1d9163e6fd61a5f0d656b064819618b3
ChaletDuino_795.languagetoolchain.version=1.33
default.com-microchip-mplab-nbide-toolchainXC32-XC32LanguageToolchain.md5=a5745c99cb5a5032f17cfaf0ff720282
com-microchip-mplab-nbide-embedded-makeproject-MakeProject.md5=9db8f8a224aa17d0023ea7f468f871dc

235
Bootloader_PIC32.X/nbproject/configurations.xml
View File

@ -28,6 +28,13 @@
<itemPath>Source/InternalUart.h</itemPath>
<itemPath>Source/SDCardMgr.h</itemPath>
<itemPath>Source/Uart.h</itemPath>
<itemPath>Source/SPI.h</itemPath>
<itemPath>Source/SPI_Flash.h</itemPath>
<itemPath>Source/BoardCfg.h</itemPath>
<itemPath>Source/BoardCfg_ChaletduinoV2.h</itemPath>
<itemPath>Source/BootloaderInterface.h</itemPath>
<itemPath>Source/FlashMapping.h</itemPath>
<itemPath>Source/checksum.h</itemPath>
</logicalFolder>
</logicalFolder>
<logicalFolder name="LinkerScript"
@ -62,12 +69,18 @@
<itemPath>Source/InternalUart.c</itemPath>
<itemPath>Source/main.c</itemPath>
<itemPath>Source/SDCardMgr.c</itemPath>
<itemPath>Source/SPI.c</itemPath>
<itemPath>Source/SPI_Flash.c</itemPath>
<itemPath>Source/ChaletduinoV2Board.c</itemPath>
<itemPath>Source/BootloaderInterface.c</itemPath>
<itemPath>Source/crc32.c</itemPath>
</logicalFolder>
</logicalFolder>
<logicalFolder name="ExternalFiles"
displayName="Important Files"
projectFiles="false">
<itemPath>Makefile</itemPath>
<itemPath>dist/ChaletDuino_795/production/Bootloader_PIC32.X.production.map</itemPath>
</logicalFolder>
</logicalFolder>
<sourceRootList>
@ -304,9 +317,10 @@
<property key="make-warnings-into-errors" value="false"/>
<property key="optimization-level" value=""/>
<property key="place-data-into-section" value="false"/>
<property key="post-instruction-scheduling" value="default"/>
<property key="pre-instruction-scheduling" value="default"/>
<property key="preprocessor-macros" value="_SUPPRESS_PLIB_WARNING"/>
<property key="post-instruction-scheduling" value="no-schedule-insns2"/>
<property key="pre-instruction-scheduling" value="no-schedule-insns"/>
<property key="preprocessor-macros"
value="_SUPPRESS_PLIB_WARNING;CHALETDUINO_V2_BRD"/>
<property key="strict-ansi" value="false"/>
<property key="support-ansi" value="false"/>
<property key="toplevel-reordering" value=""/>
@ -470,7 +484,6 @@
<property key="UART6" value="true"/>
<property key="USB" value="true"/>
<property key="debugoptions.useswbreakpoints" value="false"/>
<property key="firmware.download.all" value="false"/>
<property key="hwtoolclock.frcindebug" value="false"/>
<property key="memories.aux" value="false"/>
<property key="memories.bootflash" value="false"/>
@ -502,6 +515,122 @@
<property key="programoptions.uselvpprogramming" value="false"/>
<property key="voltagevalue" value="3.25"/>
</ICD3PlatformTool>
<item path="Source/BootloaderProtocol.c" ex="true" overriding="false">
</item>
<item path="Source/BootloaderProtocol.h" ex="true" overriding="false">
</item>
<item path="Source/FatFS/ff.c" ex="true" overriding="false">
<C32>
</C32>
<C32-AR>
</C32-AR>
<C32-AS>
</C32-AS>
<C32-CO>
</C32-CO>
<C32-LD>
</C32-LD>
<C32CPP>
</C32CPP>
<C32Global>
</C32Global>
</item>
<item path="Source/FatFS/ff.h" ex="true" overriding="false">
<C32>
</C32>
<C32-AR>
</C32-AR>
<C32-AS>
</C32-AS>
<C32-CO>
</C32-CO>
<C32-LD>
</C32-LD>
<C32CPP>
</C32CPP>
<C32Global>
</C32Global>
</item>
<item path="Source/FatFS/ffconf.h" ex="true" overriding="false">
<C32>
</C32>
<C32-AR>
</C32-AR>
<C32-AS>
</C32-AS>
<C32-CO>
</C32-CO>
<C32-LD>
</C32-LD>
<C32CPP>
</C32CPP>
<C32Global>
</C32Global>
</item>
<item path="Source/FatFS/ffsystem.c" ex="true" overriding="false">
<C32>
</C32>
<C32-AR>
</C32-AR>
<C32-AS>
</C32-AS>
<C32-CO>
</C32-CO>
<C32-LD>
</C32-LD>
<C32CPP>
</C32CPP>
<C32Global>
</C32Global>
</item>
<item path="Source/FatFS/ffunicode.c" ex="true" overriding="false">
<C32>
</C32>
<C32-AR>
</C32-AR>
<C32-AS>
</C32-AS>
<C32-CO>
</C32-CO>
<C32-LD>
</C32-LD>
<C32CPP>
</C32CPP>
<C32Global>
</C32Global>
</item>
<item path="Source/FatFS/integer.h" ex="true" overriding="false">
<C32>
</C32>
<C32-AR>
</C32-AR>
<C32-AS>
</C32-AS>
<C32-CO>
</C32-CO>
<C32-LD>
</C32-LD>
<C32CPP>
</C32CPP>
<C32Global>
</C32Global>
</item>
<item path="Source/FatFS/mmc_drv.c" ex="true" overriding="false">
<C32>
</C32>
<C32-AR>
</C32-AR>
<C32-AS>
</C32-AS>
<C32-CO>
</C32-CO>
<C32-LD>
</C32-LD>
<C32CPP>
</C32CPP>
<C32Global>
</C32Global>
</item>
<item path="Source/SDCardMgr.c" ex="true" overriding="false">
<C32>
</C32>
@ -535,24 +664,122 @@
</C32Global>
</item>
<item path="Source/thinfat32/src/fat32_ui.c" ex="true" overriding="false">
<C32>
</C32>
<C32-AR>
</C32-AR>
<C32-AS>
</C32-AS>
<C32-CO>
</C32-CO>
<C32-LD>
</C32-LD>
<C32CPP>
</C32CPP>
<C32Global>
</C32Global>
</item>
<item path="Source/thinfat32/src/include/fat32.h" ex="true" overriding="false">
<C32>
</C32>
<C32-AR>
</C32-AR>
<C32-AS>
</C32-AS>
<C32-CO>
</C32-CO>
<C32-LD>
</C32-LD>
<C32CPP>
</C32CPP>
<C32Global>
</C32Global>
</item>
<item path="Source/thinfat32/src/include/fat32_ui.h"
ex="true"
overriding="false">
<C32>
</C32>
<C32-AR>
</C32-AR>
<C32-AS>
</C32-AS>
<C32-CO>
</C32-CO>
<C32-LD>
</C32-LD>
<C32CPP>
</C32CPP>
<C32Global>
</C32Global>
</item>
<item path="Source/thinfat32/src/include/thinfat32.h"
ex="true"
overriding="false">
<C32>
</C32>
<C32-AR>
</C32-AR>
<C32-AS>
</C32-AS>
<C32-CO>
</C32-CO>
<C32-LD>
</C32-LD>
<C32CPP>
</C32CPP>
<C32Global>
</C32Global>
</item>
<item path="Source/thinfat32/src/include/thinternal.h"
ex="true"
overriding="false">
<C32>
</C32>
<C32-AR>
</C32-AR>
<C32-AS>
</C32-AS>
<C32-CO>
</C32-CO>
<C32-LD>
</C32-LD>
<C32CPP>
</C32CPP>
<C32Global>
</C32Global>
</item>
<item path="Source/thinfat32/src/tests.c" ex="true" overriding="false">
<C32>
</C32>
<C32-AR>
</C32-AR>
<C32-AS>
</C32-AS>
<C32-CO>
</C32-CO>
<C32-LD>
</C32-LD>
<C32CPP>
</C32CPP>
<C32Global>
</C32Global>
</item>
<item path="Source/thinfat32/src/thinfat32.c" ex="true" overriding="false">
<C32>
</C32>
<C32-AR>
</C32-AR>
<C32-AS>
</C32-AS>
<C32-CO>
</C32-CO>
<C32-LD>
</C32-LD>
<C32CPP>
</C32CPP>
<C32Global>
</C32Global>
</item>
</conf>
</confs>

4
Bootloader_PIC32.X/nbproject/private/private.xml
View File

@ -3,7 +3,9 @@
<editor-bookmarks xmlns="http://www.netbeans.org/ns/editor-bookmarks/2" lastBookmarkId="0"/>
<open-files xmlns="http://www.netbeans.org/ns/projectui-open-files/2">
<group>
<file>file:/D:/Main/PicDev/Projets/Bootloader_PIC32/Bootloader_PIC32.X/procdefs.ld</file>
<file>file:/D:/Main/PicDev/Projets/BootloaderPIC32/Bootloader_PIC32.X/Source/FlashInterface.c</file>
<file>file:/D:/Main/PicDev/Projets/BootloaderPIC32/Bootloader_PIC32.X/Source/BootloaderInterface.c</file>
<file>file:/D:/Main/PicDev/Projets/BootloaderPIC32/Bootloader_PIC32.X/Source/FlashInterface.h</file>
</group>
</open-files>
</project-private>

2
Bootloader_PIC32.X/procdefs.ld
View File

@ -35,7 +35,7 @@ _GEN_EXCPT_ADDR = _ebase_address + 0x180; /* As defined by the MIPS sp
*************************************************************************/
MEMORY
{
kseg0_program_mem (rx) : ORIGIN = 0x9D000000, LENGTH = 0xA000 /* 10 program Flash pages are reserved for bootloader code */
kseg0_program_mem (rx) : ORIGIN = 0x9D000000, LENGTH = 0x4000 /* 4 program Flash pages are reserved for bootloader code */
kseg0_boot_mem : ORIGIN = 0x9FC00490, LENGTH = 0x970 /* C Init section goes here : ends at 0x9FC01370 */
/*exception_mem : ORIGIN = 0x9D002000, LENGTH = 0x1000 */
exception_mem : ORIGIN = 0x9FC01000, LENGTH = 0x1000

BIN
Memory map.xlsx Normal file
View File

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