diff --git a/Current Sensor/Current Sensor.b#1 b/Current Sensor/Current Sensor.b#1 index 1377933..523c14a 100644 --- a/Current Sensor/Current Sensor.b#1 +++ b/Current Sensor/Current Sensor.b#1 @@ -8,7 +8,7 @@ - + @@ -28,16 +28,16 @@ - + - + - + - + @@ -46,9 +46,9 @@ - + - + @@ -58,7 +58,7 @@ - + @@ -175,6 +175,31 @@ +VCC +GND +OCF +VREF +VIOUT +VCC +GND +GAINSEL0 +GAINSEL1 +CUR_IN +CUR_OUT + + + + + + + + + + + + + + @@ -540,7 +565,7 @@ by exp-lbrs.ulp - + @@ -568,19 +593,19 @@ by exp-lbrs.ulp - + - + - + - + @@ -593,7 +618,7 @@ by exp-lbrs.ulp - + @@ -612,8 +637,97 @@ by exp-lbrs.ulp + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + - + @@ -632,6 +746,73 @@ by exp-lbrs.ulp + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/Current Sensor/Current Sensor.b#2 b/Current Sensor/Current Sensor.b#2 index 7594471..dd3f62b 100644 --- a/Current Sensor/Current Sensor.b#2 +++ b/Current Sensor/Current Sensor.b#2 @@ -175,6 +175,17 @@ +VCC +GND +OCF +VREF +VIOUT +VCC +GND +GAINSEL0 +GAINSEL1 +CUR_IN +CUR_OUT @@ -340,60 +351,52 @@ by exp-lbrs.ulp - -<b>EAGLE Design Rules</b> -<p> -Die Standard-Design-Rules sind so gewählt, dass sie für -die meisten Anwendungen passen. Sollte ihre Platine -besondere Anforderungen haben, treffen Sie die erforderlichen -Einstellungen hier und speichern die Design Rules unter -einem neuen Namen ab. -<b>EAGLE Design Rules</b> -<p> -The default Design Rules have been set to cover -a wide range of applications. Your particular design -may have different requirements, so please make the -necessary adjustments and save your customized -design rules under a new name. + +<b>JLCPCB design rules (2 layers)</b> +<ul> +<li>Board thickness: 1.6mm</li> +<li>Copper weight: 1oz (35um)</li> +<li>Note: annular ring aren't minimal</li> +</ul> - - - - - - - - - - + + + + + + + + + + - + - - - + + + - - - - - - - + + + + + + + - + - - + + - + @@ -547,9 +550,9 @@ design rules under a new name. - - - + + + @@ -575,25 +578,25 @@ design rules under a new name. - - - + + + - - - + + + - - - + + + - - - + + + - - - + + + @@ -601,7 +604,7 @@ design rules under a new name. - + @@ -620,8 +623,97 @@ design rules under a new name. + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + - + @@ -640,6 +732,73 @@ design rules under a new name. + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + @@ -655,71 +814,102 @@ design rules under a new name. - - - - + + + - - - - - - + + + + + - - - - - + - - + + + + + + + + - - + + + + + + - - + + + + + + + + + + + + - - - + + + + + + - - + + + + + + + + + - + + - + + + + + + + @@ -729,12 +919,18 @@ design rules under a new name. - + - - + + + + + + + + diff --git a/Current Sensor/Current Sensor.b#3 b/Current Sensor/Current Sensor.b#3 index 4ee7e5e..74116fe 100644 --- a/Current Sensor/Current Sensor.b#3 +++ b/Current Sensor/Current Sensor.b#3 @@ -50,13 +50,13 @@ - + - - + + @@ -78,96 +78,96 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + @@ -175,6 +175,15 @@ +VCC +GND +OCF +VREF +VIOUT +VCC +GND +GAINSEL0 +GAINSEL1 @@ -340,60 +349,52 @@ by exp-lbrs.ulp - -<b>EAGLE Design Rules</b> -<p> -Die Standard-Design-Rules sind so gewählt, dass sie für -die meisten Anwendungen passen. Sollte ihre Platine -besondere Anforderungen haben, treffen Sie die erforderlichen -Einstellungen hier und speichern die Design Rules unter -einem neuen Namen ab. -<b>EAGLE Design Rules</b> -<p> -The default Design Rules have been set to cover -a wide range of applications. Your particular design -may have different requirements, so please make the -necessary adjustments and save your customized -design rules under a new name. + +<b>JLCPCB design rules (2 layers)</b> +<ul> +<li>Board thickness: 1.6mm</li> +<li>Copper weight: 1oz (35um)</li> +<li>Note: annular ring aren't minimal</li> +</ul> - - - - - - - - - - + + + + + + + + + + - + - - - + + + - - - - - - - + + + + + + + - + - - + + - + @@ -547,25 +548,25 @@ design rules under a new name. - - - + + + - - - + + + - - - + + + - - - + + + - - - + + + @@ -575,25 +576,25 @@ design rules under a new name. - - - + + + - - - + + + - - - + + + - - - + + + - - - + + + @@ -601,34 +602,201 @@ design rules under a new name. - + - - + + - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + - + - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + @@ -643,72 +811,103 @@ design rules under a new name. - - - - - + + + + - - - - - - + + + + + - - - - - + - - + + + + + + + + - - + + + + + + - - + + + + + + + + + + + + - - - + + + + + + - - + + + + + + + + + - + + - + + + + + + + @@ -718,12 +917,18 @@ design rules under a new name. - + - - + + + + + + + + diff --git a/Current Sensor/Current Sensor.b#4 b/Current Sensor/Current Sensor.b#4 index 3ee0ed6..dbcaab7 100644 --- a/Current Sensor/Current Sensor.b#4 +++ b/Current Sensor/Current Sensor.b#4 @@ -6,9 +6,9 @@ - + - + @@ -28,14 +28,14 @@ - + - + - + - - + + @@ -46,19 +46,19 @@ - + - + - + - - + + - + @@ -78,103 +78,108 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + - - - - + + + + +VCC +GND +OCF +VREF +VIOUT @@ -254,25 +259,6 @@ <b>Samtec Connectors</b><p> <author>Created by librarian@cadsoft.de</author> - -<b>THROUGH-HOLE .025" SQ POST HEADER</b><p> -Source: Samtec TSW.pdf - - - - - - - - -1 ->NAME ->VALUE - - - - - <b>THROUGH-HOLE .025" SQ POST HEADER</b><p> Source: Samtec TSW.pdf @@ -334,6 +320,22 @@ chip + +Generated from <b>BeagleBone_Black_Wireless.sch</b><p> +by exp-lbrs.ulp + + + + + + + + + + + + + @@ -343,60 +345,52 @@ chip - -<b>EAGLE Design Rules</b> -<p> -Die Standard-Design-Rules sind so gewählt, dass sie für -die meisten Anwendungen passen. Sollte ihre Platine -besondere Anforderungen haben, treffen Sie die erforderlichen -Einstellungen hier und speichern die Design Rules unter -einem neuen Namen ab. -<b>EAGLE Design Rules</b> -<p> -The default Design Rules have been set to cover -a wide range of applications. Your particular design -may have different requirements, so please make the -necessary adjustments and save your customized -design rules under a new name. + +<b>JLCPCB design rules (2 layers)</b> +<ul> +<li>Board thickness: 1.6mm</li> +<li>Copper weight: 1oz (35um)</li> +<li>Note: annular ring aren't minimal</li> +</ul> - - - - - - - - - - + + + + + + + + + + - + - - - + + + - - - - - - - + + + + + + + - + - - + + - + @@ -527,138 +521,280 @@ design rules under a new name. - - - - - - - - - - - + + + + + + + + + + + - - - - - - - - - - + + + + + + + + + + - - - - - - - + + + - - - + + + - - - + + + - - - + + + - - - + + + - - - + + + + + + + - - - + + + - - - + + + - - - + + + - - - + + + - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + - + - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + - + - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + - - - - @@ -667,89 +803,107 @@ design rules under a new name. - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + - - + + + + + + + + - - + + + + + + - - + + + + + + + + + + + + - - - + + + + + + - - + + + + + + + + + - + + - + + + + + + + @@ -757,10 +911,20 @@ design rules under a new name. - - - - + + + + + + + + + + + + + + @@ -778,5 +942,15 @@ Since Version 8.2, EAGLE supports online libraries. The ids of those online libraries will not be understood (or retained) with this version. + +Since Version 8.3, EAGLE supports URNs for individual library +assets (packages, symbols, and devices). The URNs of those assets +will not be understood (or retained) with this version. + + +Since Version 8.3, EAGLE supports the association of 3D packages +with devices in libraries, schematics, and board files. Those 3D +packages will not be understood (or retained) with this version. + diff --git a/Current Sensor/Current Sensor.b#5 b/Current Sensor/Current Sensor.b#5 index 22fe517..fe615fe 100644 --- a/Current Sensor/Current Sensor.b#5 +++ b/Current Sensor/Current Sensor.b#5 @@ -6,7 +6,7 @@ - + @@ -34,8 +34,8 @@ - - + + @@ -50,13 +50,13 @@ - + - - + + @@ -78,103 +78,103 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + - - - - + + + + @@ -254,25 +254,6 @@ <b>Samtec Connectors</b><p> <author>Created by librarian@cadsoft.de</author> - -<b>THROUGH-HOLE .025" SQ POST HEADER</b><p> -Source: Samtec TSW.pdf - - - - - - - - -1 ->NAME ->VALUE - - - - - <b>THROUGH-HOLE .025" SQ POST HEADER</b><p> Source: Samtec TSW.pdf @@ -334,6 +315,22 @@ chip + +Generated from <b>BeagleBone_Black_Wireless.sch</b><p> +by exp-lbrs.ulp + + + + + + + + + + + + + @@ -343,60 +340,52 @@ chip - -<b>EAGLE Design Rules</b> -<p> -Die Standard-Design-Rules sind so gewählt, dass sie für -die meisten Anwendungen passen. Sollte ihre Platine -besondere Anforderungen haben, treffen Sie die erforderlichen -Einstellungen hier und speichern die Design Rules unter -einem neuen Namen ab. -<b>EAGLE Design Rules</b> -<p> -The default Design Rules have been set to cover -a wide range of applications. Your particular design -may have different requirements, so please make the -necessary adjustments and save your customized -design rules under a new name. + +<b>JLCPCB design rules (2 layers)</b> +<ul> +<li>Board thickness: 1.6mm</li> +<li>Copper weight: 1oz (35um)</li> +<li>Note: annular ring aren't minimal</li> +</ul> - - - - - - - - - - + + + + + + + + + + - + - - - + + + - - - - - - - + + + + + + + - + - - + + - + @@ -527,138 +516,280 @@ design rules under a new name. - - - - - - - - - - - + + + + + + + + + + + - - - - - - - - - - + + + + + + + + + + - - - - - - - + + + - - - + + + - - - + + + - - - + + + - - - + + + - - - + + + + + + + - - - + + + - - - + + + - - - + + + - - - + + + - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + - + - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + - + - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + - - - - @@ -667,99 +798,128 @@ design rules under a new name. - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + - - + + + + + + + + - - + + + + + + - - + + + + + + + + + + + + - - - + + + + + + - - + + + + + + + + + - + + - + + + + + + + + + + + + + + + + + + + + + + + + + + + + @@ -777,5 +937,15 @@ Since Version 8.2, EAGLE supports online libraries. The ids of those online libraries will not be understood (or retained) with this version. + +Since Version 8.3, EAGLE supports URNs for individual library +assets (packages, symbols, and devices). The URNs of those assets +will not be understood (or retained) with this version. + + +Since Version 8.3, EAGLE supports the association of 3D packages +with devices in libraries, schematics, and board files. Those 3D +packages will not be understood (or retained) with this version. + diff --git a/Current Sensor/Current Sensor.b#6 b/Current Sensor/Current Sensor.b#6 index 6802205..1377933 100644 --- a/Current Sensor/Current Sensor.b#6 +++ b/Current Sensor/Current Sensor.b#6 @@ -6,7 +6,7 @@ - + @@ -34,8 +34,8 @@ - - + + @@ -50,13 +50,13 @@ - + - - + + @@ -78,103 +78,103 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + - - - - + + + + @@ -254,25 +254,6 @@ <b>Samtec Connectors</b><p> <author>Created by librarian@cadsoft.de</author> - -<b>THROUGH-HOLE .025" SQ POST HEADER</b><p> -Source: Samtec TSW.pdf - - - - - - - - -1 ->NAME ->VALUE - - - - - <b>THROUGH-HOLE .025" SQ POST HEADER</b><p> Source: Samtec TSW.pdf @@ -334,6 +315,22 @@ chip + +Generated from <b>BeagleBone_Black_Wireless.sch</b><p> +by exp-lbrs.ulp + + + + + + + + + + + + + @@ -343,60 +340,52 @@ chip - -<b>EAGLE Design Rules</b> -<p> -Die Standard-Design-Rules sind so gewählt, dass sie für -die meisten Anwendungen passen. Sollte ihre Platine -besondere Anforderungen haben, treffen Sie die erforderlichen -Einstellungen hier und speichern die Design Rules unter -einem neuen Namen ab. -<b>EAGLE Design Rules</b> -<p> -The default Design Rules have been set to cover -a wide range of applications. Your particular design -may have different requirements, so please make the -necessary adjustments and save your customized -design rules under a new name. + +<b>JLCPCB design rules (2 layers)</b> +<ul> +<li>Board thickness: 1.6mm</li> +<li>Copper weight: 1oz (35um)</li> +<li>Note: annular ring aren't minimal</li> +</ul> - - - - - - - - - - + + + + + + + + + + - + - - - + + + - - - - - - - + + + + + + + - + - - + + - + @@ -527,176 +516,254 @@ design rules under a new name. - - - - - - - - - - - + + + + + + + + + + + - - - - - - - - - - + + + + + + + + + + - - - - - - - + + + - - - + + + - - - + + + - - - + + + - - - + + + - - - + + + + + + + - - - + + + - - - + + + - - - + + + - - - + + + - - - - - - - - - - - + + + + + + + - + - - - - - + + + + + + + + + + + + - + - - - - - + + + + + + + + + + + + - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + - - + + + + + + + + - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + @@ -714,5 +781,15 @@ Since Version 8.2, EAGLE supports online libraries. The ids of those online libraries will not be understood (or retained) with this version. + +Since Version 8.3, EAGLE supports URNs for individual library +assets (packages, symbols, and devices). The URNs of those assets +will not be understood (or retained) with this version. + + +Since Version 8.3, EAGLE supports the association of 3D packages +with devices in libraries, schematics, and board files. Those 3D +packages will not be understood (or retained) with this version. + diff --git a/Current Sensor/Current Sensor.b#7 b/Current Sensor/Current Sensor.b#7 index 28d6567..7594471 100644 --- a/Current Sensor/Current Sensor.b#7 +++ b/Current Sensor/Current Sensor.b#7 @@ -6,7 +6,7 @@ - + @@ -34,8 +34,8 @@ - - + + @@ -50,13 +50,13 @@ - + - - + + @@ -78,103 +78,103 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + - - - - + + + + @@ -250,6 +250,87 @@ + +<b>Samtec Connectors</b><p> +<author>Created by librarian@cadsoft.de</author> + + +<b>THROUGH-HOLE .025" SQ POST HEADER</b><p> +Source: Samtec TSW.pdf + + + + + + + + + +1 +>NAME +>VALUE + + + + + + + + + + + +<b>CAPACITOR</b><p> +chip + + + + + + + + +>NAME +>VALUE + + + + + +<b>RESISTOR</b><p> +chip + + + + + + + + +>NAME +>VALUE + + + + + + + +Generated from <b>BeagleBone_Black_Wireless.sch</b><p> +by exp-lbrs.ulp + + + + + + + + + + + + + @@ -443,56 +524,217 @@ design rules under a new name. - - - - - - - - - - - + + + + + + + + + + + - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + - + - - - - - + + + + + + + + + + + + - + - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + @@ -504,4 +746,21 @@ design rules under a new name. + + +Since Version 8.2, EAGLE supports online libraries. The ids +of those online libraries will not be understood (or retained) +with this version. + + +Since Version 8.3, EAGLE supports URNs for individual library +assets (packages, symbols, and devices). The URNs of those assets +will not be understood (or retained) with this version. + + +Since Version 8.3, EAGLE supports the association of 3D packages +with devices in libraries, schematics, and board files. Those 3D +packages will not be understood (or retained) with this version. + + diff --git a/Current Sensor/Current Sensor.b#8 b/Current Sensor/Current Sensor.b#8 index 28d6567..4ee7e5e 100644 --- a/Current Sensor/Current Sensor.b#8 +++ b/Current Sensor/Current Sensor.b#8 @@ -6,7 +6,7 @@ - + @@ -34,8 +34,8 @@ - - + + @@ -171,10 +171,10 @@ - - - - + + + + @@ -250,6 +250,87 @@ + +<b>Samtec Connectors</b><p> +<author>Created by librarian@cadsoft.de</author> + + +<b>THROUGH-HOLE .025" SQ POST HEADER</b><p> +Source: Samtec TSW.pdf + + + + + + + + + +1 +>NAME +>VALUE + + + + + + + + + + + +<b>CAPACITOR</b><p> +chip + + + + + + + + +>NAME +>VALUE + + + + + +<b>RESISTOR</b><p> +chip + + + + + + + + +>NAME +>VALUE + + + + + + + +Generated from <b>BeagleBone_Black_Wireless.sch</b><p> +by exp-lbrs.ulp + + + + + + + + + + + + + @@ -443,56 +524,206 @@ design rules under a new name. - - - - - - - - - - - + + + + + + + + + + + - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + - + - - - - - + + + + + + + + - + - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + @@ -504,4 +735,21 @@ design rules under a new name. + + +Since Version 8.2, EAGLE supports online libraries. The ids +of those online libraries will not be understood (or retained) +with this version. + + +Since Version 8.3, EAGLE supports URNs for individual library +assets (packages, symbols, and devices). The URNs of those assets +will not be understood (or retained) with this version. + + +Since Version 8.3, EAGLE supports the association of 3D packages +with devices in libraries, schematics, and board files. Those 3D +packages will not be understood (or retained) with this version. + + diff --git a/Current Sensor/Current Sensor.b#9 b/Current Sensor/Current Sensor.b#9 index 628a75a..3ee0ed6 100644 --- a/Current Sensor/Current Sensor.b#9 +++ b/Current Sensor/Current Sensor.b#9 @@ -57,8 +57,15 @@ + + + + + + + @@ -70,6 +77,97 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + @@ -121,6 +219,121 @@ + + + + + + + + + + + + + + + + + + + + + +>NAME +>VALUE + + + + + + + + + +<b>Samtec Connectors</b><p> +<author>Created by librarian@cadsoft.de</author> + + +<b>THROUGH-HOLE .025" SQ POST HEADER</b><p> +Source: Samtec TSW.pdf + + + + + + + + +1 +>NAME +>VALUE + + + + + + +<b>THROUGH-HOLE .025" SQ POST HEADER</b><p> +Source: Samtec TSW.pdf + + + + + + + + + +1 +>NAME +>VALUE + + + + + + + + + + + +<b>CAPACITOR</b><p> +chip + + + + + + + + +>NAME +>VALUE + + + + + +<b>RESISTOR</b><p> +chip + + + + + + + + +>NAME +>VALUE + + + + + + @@ -314,20 +527,241 @@ design rules under a new name. - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + @@ -338,4 +772,11 @@ design rules under a new name. + + +Since Version 8.2, EAGLE supports online libraries. The ids +of those online libraries will not be understood (or retained) +with this version. + + diff --git a/Current Sensor/Current Sensor.brd b/Current Sensor/Current Sensor.brd index fe615fe..7aa913d 100644 --- a/Current Sensor/Current Sensor.brd +++ b/Current Sensor/Current Sensor.brd @@ -8,7 +8,7 @@ - + @@ -28,11 +28,11 @@ - + - + - + @@ -46,9 +46,9 @@ - + - + @@ -58,7 +58,7 @@ - + @@ -175,6 +175,31 @@ +VCC +GND +OCF +VREF +VIOUT +VCC +GND +GAINSEL0 +GAINSEL1 +CUR_IN +CUR_OUT + + + + + + + + + + + + + + @@ -540,7 +565,7 @@ by exp-lbrs.ulp - + @@ -568,19 +593,19 @@ by exp-lbrs.ulp - + - + - + - + @@ -689,14 +714,14 @@ by exp-lbrs.ulp - - - - - - - - + + + + + + + + @@ -782,12 +807,12 @@ by exp-lbrs.ulp - + - - + + diff --git a/Current Sensor/Current Sensor_2022-03-29.zip b/Current Sensor/Current Sensor_2022-03-29.zip new file mode 100644 index 0000000..cce7db8 Binary files /dev/null and b/Current Sensor/Current Sensor_2022-03-29.zip differ diff --git a/Lora Board/eagle.epf b/Lora Board/eagle.epf index 732d2e7..6ddbc18 100644 --- a/Lora Board/eagle.epf +++ b/Lora Board/eagle.epf @@ -329,54 +329,10 @@ UsedLibrary="C:/Users/JF/Documents/EAGLE/libraries/ZX62R-B-5P_30_.lbr" UsedLibrary="C:/Users/JF/Documents/EAGLE/libraries/adafruit.lbr" [Win_1] -Type="Board Editor" -Number=2 -File="D:/Main/PicDev/Projets/Eagle/ChaletLoraInterface/ChaletLoraInterface_V1.brd" -View="21.9366 45.3405 84.06 151.356" -WireWidths=" 0.0762 0.1016 0.15 0.2 0.2032 0.254 0.3048 0.4064 0.508 0.6096 0.8128 1.016 1.27 2.54 0.1524 0.127" -PadDiameters=" 0.3048 0.4064 0.6096 0.8128 1.016 1.27 1.4224 1.6764 1.778 1.9304 2.1844 2.54 3.81 6.4516 0 0.6" -PadDrills=" 0.2 0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.65 0.7 0.75 0.8 0.85 0.9 1 0.6" -ViaDiameters=" 0.55 0.65 0.7 0.75 0.8 0.85 0.9 0.95 1 1.05 1.1 1.15 1.2 1.3 0 0.6" -ViaDrills=" 0.2 0.25 0.4 0.45 0.5 0.55 0.6 0.65 0.7 0.75 0.8 0.85 0.9 1 0.35 0.3" -HoleDrills=" 0.2 0.25 0.3 0.4 0.45 0.5 0.55 0.6 0.65 0.7 0.75 0.8 0.85 0.9 1 0.35" -TextSizes=" 0.254 0.3048 0.4064 0.6096 0.8128 1.016 1.4224 1.6764 1.9304 2.1844 2.54 3.81 5.08 6.4516 1.778 1.27" -PolygonSpacings=" 0.254 0.3048 0.4064 0.6096 0.8128 1.016 1.4224 1.6764 1.778 1.9304 2.1844 2.54 3.81 5.08 6.4516 1.27" -PolygonIsolates=" 0.254 0.3048 0.4064 0.6096 0.8128 1.016 1.27 1.4224 1.6764 1.778 1.9304 2.1844 2.54 3.81 6.4516 0" -MiterRadiuss=" 0.254 0.3175 0.635 1.27 2.54 1 2 2.5 5 7.5 10 0" -DimensionWidths=" 0 0.127 0.254 0.1 0.26 0.13" -DimensionExtWidths=" 0.127 0.254 0.1 0.13 0.26 0" -DimensionExtLengths=" 1.27 2.54 1 2 3 0" -DimensionExtOffsets=" 1.27 2.54 1 2 3 0" -SmdSizes=" 0.3048 0.1524 0.4064 0.2032 0.6096 0.3048 0.8128 0.4064 1.016 0.508 1.27 0.6604 1.4224 0.7112 1.6764 0.8128 1.778 0.9144 1.9304 0.9652 2.1844 1.0668 2.54 1.27 3.81 1.9304 5.08 2.54 6.4516 3.2512 1.27 0.635" -WireBend=1 -WireBendSet=0 -WireCap=1 -MiterStyle=1 -PadShape=0 -ViaShape=1 -PolygonPour=0 -PolygonRank=1 -PolygonThermals=1 -PolygonOrphans=0 -TextRatio=8 -DimensionUnit=1 -DimensionPrecision=2 -DimensionShowUnit=0 -PinDirection=3 -PinFunction=0 -PinLength=2 -PinVisible=3 -SwapLevel=0 -ArcDirection=0 -AddLevel=2 -PadsSameType=0 -Layer=1 - -[Win_2] Type="Schematic Editor" Number=1 -File="D:/Main/PicDev/Projets/Eagle/ChaletLoraInterface/ChaletLoraInterface_V1.sch" -View="13.3883 -205.069 218.69 -71.3162" +File="D:/Main/PicDev/Projets/Eagle/Current Sensor/Current Sensor.sch" +View="34.2393 -42.9217 236.745 108.662" WireWidths=" 0.0762 0.1016 0.127 0.15 0.2 0.2032 0.254 0.3048 0.4064 0.508 0.6096 0.8128 1.016 1.27 2.54 0.1524" PadDiameters=" 0.254 0.3048 0.4064 0.6096 0.8128 1.016 1.27 1.4224 1.6764 1.778 1.9304 2.1844 2.54 3.81 6.4516 0" PadDrills=" 0.2 0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.65 0.7 0.75 0.8 0.85 0.9 1 0.6" @@ -415,9 +371,53 @@ ArcDirection=0 AddLevel=2 PadsSameType=0 Layer=91 -Views=" 1: 13.3883 -205.069 218.69 -71.3162" +Views=" 1: 34.2393 -42.9217 236.745 108.662" Sheet="1" +[Win_2] +Type="Board Editor" +Number=2 +File="D:/Main/PicDev/Projets/Eagle/Current Sensor/Current Sensor.brd" +View="21.7584 -2.37775 66.8506 65.1178" +WireWidths=" 0.0762 0.1016 0.15 0.2 0.2032 0.254 0.3048 0.4064 0.508 0.6096 0.8128 1.016 1.27 2.54 0.1524 0.127" +PadDiameters=" 0.3048 0.4064 0.6096 0.8128 1.016 1.27 1.4224 1.6764 1.778 1.9304 2.1844 2.54 3.81 6.4516 0 0.6" +PadDrills=" 0.2 0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.65 0.7 0.75 0.8 0.85 0.9 1 0.6" +ViaDiameters=" 0.55 0.65 0.7 0.75 0.8 0.85 0.9 0.95 1 1.05 1.1 1.15 1.2 1.3 0 0.6" +ViaDrills=" 0.2 0.25 0.4 0.45 0.5 0.55 0.6 0.65 0.7 0.75 0.8 0.85 0.9 1 0.35 0.3" +HoleDrills=" 0.2 0.25 0.3 0.4 0.45 0.5 0.55 0.6 0.65 0.7 0.75 0.8 0.85 0.9 1 0.35" +TextSizes=" 0.254 0.3048 0.4064 1.016 1.4224 1.9304 2.1844 2.54 3.81 5.08 6.4516 1.27 0.6096 0.8128 1.6764 1.778" +PolygonSpacings=" 0.254 0.3048 0.4064 0.6096 0.8128 1.016 1.4224 1.6764 1.778 1.9304 2.1844 2.54 3.81 5.08 6.4516 1.27" +PolygonIsolates=" 0.254 0.3048 0.4064 0.6096 0.8128 1.016 1.27 1.4224 1.6764 1.778 1.9304 2.1844 2.54 3.81 6.4516 0" +MiterRadiuss=" 0.254 0.3175 0.635 1.27 2.54 1 2 2.5 5 7.5 10 0" +DimensionWidths=" 0 0.127 0.254 0.1 0.26 0.13" +DimensionExtWidths=" 0.127 0.254 0.1 0.13 0.26 0" +DimensionExtLengths=" 1.27 2.54 1 2 3 0" +DimensionExtOffsets=" 1.27 2.54 1 2 3 0" +SmdSizes=" 0.3048 0.1524 0.4064 0.2032 0.6096 0.3048 0.8128 0.4064 1.016 0.508 1.27 0.6604 1.4224 0.7112 1.6764 0.8128 1.778 0.9144 1.9304 0.9652 2.1844 1.0668 2.54 1.27 3.81 1.9304 5.08 2.54 6.4516 3.2512 1.27 0.635" +WireBend=0 +WireBendSet=0 +WireCap=1 +MiterStyle=1 +PadShape=0 +ViaShape=1 +PolygonPour=0 +PolygonRank=1 +PolygonThermals=1 +PolygonOrphans=0 +TextRatio=8 +DimensionUnit=1 +DimensionPrecision=2 +DimensionShowUnit=0 +PinDirection=3 +PinFunction=0 +PinLength=2 +PinVisible=3 +SwapLevel=0 +ArcDirection=0 +AddLevel=2 +PadsSameType=0 +Layer=30 + [Win_3] Type="Control Panel" Number=0