410 lines
12 KiB
C
410 lines
12 KiB
C
/*******************************************************************************
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File Name:
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nmdrv.c
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Summary:
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This module contains WINC3400 M2M driver APIs implementation.
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Description:
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This module contains WINC3400 M2M driver APIs implementation.
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*******************************************************************************/
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//DOM-IGNORE-BEGIN
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/*******************************************************************************
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* Copyright (C) 2021 Microchip Technology Inc. and its subsidiaries.
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*
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* Subject to your compliance with these terms, you may use Microchip software
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* and any derivatives exclusively with Microchip products. It is your
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* responsibility to comply with third party license terms applicable to your
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* use of third party software (including open source software) that may
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* accompany Microchip software.
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*
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* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER
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* EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY IMPLIED
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* WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS FOR A
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* PARTICULAR PURPOSE.
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*
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* IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE,
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* INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND
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* WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS
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* BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE
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* FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN
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* ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
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* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
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*******************************************************************************/
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#include "nm_common.h"
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#include "nmbus.h"
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#include "nm_bsp.h"
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#include "nmdrv.h"
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#include "nmasic.h"
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#include "m2m_types.h"
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#include "nmspi.h"
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static tenuNmState genuNmState = NM_STATE_DEINIT;
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/**
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* @fn nm_get_hif_info(uint16_t *pu16FwHifInfo, uint16_t *pu16OtaHifInfo);
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* @brief Get Hif info of images in both partitions (Firmware and Ota).
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* @param[out] pu16FwHifInfo
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* Pointer holding Hif info of image in the active partition.
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* @param[out] pu16OtaHifInfo
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* Pointer holding Hif info of image in the inactive partition.
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* @return @ref M2M_SUCCESS in case of success and Negative error code in case of failure
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*/
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int8_t nm_get_hif_info(uint16_t *pu16FwHifInfo, uint16_t *pu16OtaHifInfo)
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{
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int8_t ret = M2M_SUCCESS;
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uint32_t reg = 0;
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ret = nm_read_reg_with_ret(NMI_REV_REG, ®);
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if(ret == M2M_SUCCESS)
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{
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if(pu16FwHifInfo != NULL)
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{
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*pu16FwHifInfo = (uint16_t)reg;
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}
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if(pu16OtaHifInfo)
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{
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*pu16OtaHifInfo = (uint16_t)(reg>>16);
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}
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}
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return ret;
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}
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/**
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* @fn nm_get_firmware_full_info(tstrM2mRev* M2mRev)
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* @brief Get Firmware version info
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* @param[out] M2mRev
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* Pointer holds address of structure @ref tstrM2mRev that contains the firmware version parameters
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*/
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int8_t nm_get_firmware_full_info(tstrM2mRev *pstrRev)
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{
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uint16_t fw_hif_info = 0;
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uint32_t reg = 0;
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int8_t ret = M2M_SUCCESS;
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tstrGpRegs strgp = {0};
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memset((uint8_t*)pstrRev, 0, sizeof(tstrM2mRev));
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nm_get_hif_info(&fw_hif_info, NULL);
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M2M_INFO("Fw HIF: %04x\r\n", fw_hif_info);
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if(M2M_GET_HIF_BLOCK(fw_hif_info) == M2M_HIF_BLOCK_VALUE)
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{
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ret = nm_read_reg_with_ret(rNMI_GP_REG_0, ®);
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if(ret == M2M_SUCCESS)
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{
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if(reg != 0)
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{
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ret = nm_read_block(reg|0x30000, (uint8_t*)&strgp, sizeof(tstrGpRegs));
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if(ret == M2M_SUCCESS)
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{
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reg = strgp.u32Firmware_Ota_rev;
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reg &= 0x0000ffff;
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if(reg != 0)
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{
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ret = nm_read_block(reg|0x30000, (uint8_t*)pstrRev, sizeof(tstrM2mRev));
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if(ret == M2M_SUCCESS)
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{
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M2M_INFO("Firmware HIF (%u) : %u.%u\r\n", M2M_GET_HIF_BLOCK(pstrRev->u16FirmwareHifInfo), M2M_GET_HIF_MAJOR(pstrRev->u16FirmwareHifInfo), M2M_GET_HIF_MINOR(pstrRev->u16FirmwareHifInfo));
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M2M_INFO("Firmware ver : %u.%u.%u\r\n", pstrRev->u8FirmwareMajor, pstrRev->u8FirmwareMinor, pstrRev->u8FirmwarePatch);
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M2M_INFO("Firmware Build %s Time %s\r\n", pstrRev->BuildDate, pstrRev->BuildTime);
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/* Check Hif info is consistent */
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if(fw_hif_info != pstrRev->u16FirmwareHifInfo)
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{
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ret = M2M_ERR_FAIL;
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M2M_ERR("Inconsistent Firmware Version\r\n");
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}
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}
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}
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else
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{
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ret = M2M_ERR_FAIL;
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}
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}
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}
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else
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{
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ret = M2M_ERR_FAIL;
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}
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}
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}
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else
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{
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ret = M2M_ERR_FAIL;
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}
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if(ret != M2M_SUCCESS)
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{
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M2M_ERR("Unknown Firmware Version\r\n");
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}
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return ret;
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}
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/**
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* @fn nm_get_ota_firmware_info(tstrM2mRev* pstrRev)
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* @brief Get Firmware version info
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* @param[out] M2mRev
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* Pointer holds address of structure @ref tstrM2mRev that contains the firmware version parameters
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*/
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int8_t nm_get_ota_firmware_info(tstrM2mRev *pstrRev)
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{
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uint16_t ota_hif_info = 0;
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uint32_t reg = 0;
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int8_t ret = M2M_SUCCESS;
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tstrGpRegs strgp = {0};
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memset((uint8_t*)pstrRev, 0, sizeof(tstrM2mRev));
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nm_get_hif_info(NULL, &ota_hif_info);
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M2M_INFO("OTA HIF: %04x\r\n", ota_hif_info);
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if(M2M_GET_HIF_BLOCK(ota_hif_info) == M2M_HIF_BLOCK_VALUE)
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{
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ret = nm_read_reg_with_ret(rNMI_GP_REG_0, ®);
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if(ret == M2M_SUCCESS)
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{
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if(reg != 0)
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{
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ret = nm_read_block(reg|0x30000, (uint8_t*)&strgp, sizeof(tstrGpRegs));
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if(ret == M2M_SUCCESS)
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{
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reg = strgp.u32Firmware_Ota_rev;
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reg >>= 16;
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if(reg != 0)
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{
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ret = nm_read_block(reg|0x30000, (uint8_t*)pstrRev, sizeof(tstrM2mRev));
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if(ret == M2M_SUCCESS)
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{
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M2M_INFO("OTA HIF (%u) : %u.%u\r\n", M2M_GET_HIF_BLOCK(pstrRev->u16FirmwareHifInfo), M2M_GET_HIF_MAJOR(pstrRev->u16FirmwareHifInfo), M2M_GET_HIF_MINOR(pstrRev->u16FirmwareHifInfo));
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M2M_INFO("OTA ver : %u.%u.%u\r\n", pstrRev->u8FirmwareMajor, pstrRev->u8FirmwareMinor, pstrRev->u8FirmwarePatch);
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M2M_INFO("OTA Build %s Time %s\r\n", pstrRev->BuildDate, pstrRev->BuildTime);
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/* Check Hif info is consistent */
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if(ota_hif_info != pstrRev->u16FirmwareHifInfo)
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{
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ret = M2M_ERR_FAIL;
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M2M_ERR("Inconsistent OTA Version\r\n");
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}
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}
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}
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else
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{
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ret = M2M_ERR_FAIL;
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}
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}
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}
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else
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{
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ret = M2M_ERR_FAIL;
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}
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}
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}
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else
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{
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ret = M2M_ERR_FAIL;
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}
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if(ret != M2M_SUCCESS)
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{
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M2M_INFO("No valid OTA image\r\n");
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}
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return ret;
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}
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/**
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* @fn nm_drv_init_download_mode
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* @brief Initialize NMC1000 driver in download mode
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* @return @ref M2M_SUCCESS in case of success and Negative error code in case of failure
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*/
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int8_t nm_drv_init_download_mode(void)
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{
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int8_t ret = M2M_SUCCESS;
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ret = nm_bus_iface_init(NULL);
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if (M2M_SUCCESS != ret) {
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M2M_ERR("[nmi start]: fail init bus\r\n");
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goto ERR1;
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}
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nm_spi_lock_init();
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/* Must do this after global reset to set SPI data packet size. */
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nm_spi_init();
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M2M_INFO("Chip ID %lx\r\n", nmi_get_chipid());
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/*disable all interrupt in ROM (to disable uart) in 2b0 chip*/
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nm_write_reg(0x20300, 0);
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genuNmState = NM_STATE_INIT;
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ERR1:
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return ret;
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}
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int8_t nm_drv_init_hold(void)
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{
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int8_t ret = M2M_SUCCESS;
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nm_spi_lock_init();
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ret = nm_bus_iface_init(NULL);
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if (M2M_SUCCESS != ret) {
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M2M_ERR("[nmi start]: fail init bus\r\n");
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goto ERR1;
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}
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#ifdef BUS_ONLY
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return;
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#endif
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#ifdef NO_HW_CHIP_EN
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ret = chip_wake();
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nm_sleep(10);
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if (M2M_SUCCESS != ret) {
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M2M_ERR("[nmi start]: fail chip_wakeup\r\n");
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goto ERR2;
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}
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/**
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Go...
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**/
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ret = chip_reset();
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if (M2M_SUCCESS != ret) {
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goto ERR2;
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}
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#endif
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M2M_INFO("Chip ID %lx\r\n", nmi_get_chipid());
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/* Must do this after global reset to set SPI data packet size. */
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nm_spi_init();
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/*return power save to default value*/
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chip_idle();
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genuNmState = NM_STATE_INIT;
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return ret;
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#ifdef NO_HW_CHIP_EN
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ERR2:
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nm_bus_iface_deinit();
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#endif
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ERR1:
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return ret;
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}
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int8_t nm_drv_init_start(void * arg)
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{
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int8_t ret = M2M_SUCCESS;
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uint8_t u8Mode = M2M_WIFI_MODE_NORMAL;
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if(NULL != arg)
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{
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u8Mode = *((uint8_t *)arg);
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if(u8Mode < M2M_WIFI_MODE_NORMAL || u8Mode >= M2M_WIFI_MODE_MAX)
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u8Mode = M2M_WIFI_MODE_NORMAL;
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}
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ret = cpu_start();
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if (M2M_SUCCESS != ret) {
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goto ERR2;
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}
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ret = wait_for_bootrom(u8Mode);
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if (M2M_SUCCESS != ret) {
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goto ERR2;
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}
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ret = wait_for_firmware_start(u8Mode);
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if (M2M_SUCCESS != ret) {
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goto ERR2;
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}
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if(M2M_WIFI_MODE_CONFIG == u8Mode) {
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goto ERR1;
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} else {
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/*continue running*/
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}
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ret = enable_interrupts();
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if (M2M_SUCCESS != ret) {
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M2M_ERR("failed to enable interrupts..\r\n");
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goto ERR2;
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}
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genuNmState = NM_STATE_START;
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return ret;
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ERR2:
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nm_bus_iface_deinit();
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nm_spi_deinit();
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ERR1:
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return ret;
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}
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/**
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* @fn nm_drv_init
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* @brief Initialize NMC1000 driver
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* @param[in] arg
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* Generic argument passed on to nm_drv_init_start
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* @return @ref M2M_SUCCESS in case of success and Negative error code in case of failure
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*/
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int8_t nm_drv_init(void* arg)
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{
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int8_t ret = M2M_SUCCESS;
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ret = nm_drv_init_hold();
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if(ret == M2M_SUCCESS)
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ret = nm_drv_init_start(arg);
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return ret;
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}
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/**
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* @fn nm_drv_deinit
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* @brief Deinitialize NMC1000 driver
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*/
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int8_t nm_drv_deinit(void* arg)
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{
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int8_t ret;
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ret = chip_deinit();
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if (M2M_SUCCESS != ret) {
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M2M_ERR("[nmi stop]: chip_deinit fail\r\n");
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goto ERR1;
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}
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ret = nm_bus_iface_deinit();
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if (M2M_SUCCESS != ret) {
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M2M_ERR("[nmi stop]: fail init bus\r\n");
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goto ERR1;
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}
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/* Must do this after global reset to set SPI data packet size. */
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nm_spi_deinit();
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ERR1:
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genuNmState = NM_STATE_DEINIT;
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return ret;
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}
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/**
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* @fn nm_cpu_start(void)
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* @brief Start CPU from the WINC module
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* @return @ref M2M_SUCCESS in case of success and Negative error code in case of failure
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*/
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int8_t nm_cpu_start(void)
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{
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int8_t ret;
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ret = cpu_start();
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return ret;
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}
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/**
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* @fn nm_get_state(void)
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* @brief Get the current state of the WINC module
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* @return The current state of the WINC module
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*/
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tenuNmState nm_get_state(void)
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{
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return genuNmState;
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}
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//DOM-IGNORE-END
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