/** * * \file * * \brief This module contains SAMD21 BSP APIs implementation. * * Copyright (c) 2018 Atmel Corporation. All rights reserved. * * \asf_license_start * * \page License * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: * * 1. Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * * 2. Redistributions in binary form must reproduce the above copyright notice, * this list of conditions and the following disclaimer in the documentation * and/or other materials provided with the distribution. * * 3. The name of Atmel may not be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * * \asf_license_stop * */ #include "bsp/include/nm_bsp.h" #include "common/include/nm_common.h" //#include "timer.h" #include "define.h" #include "DigitalIO.h" //#include //#include "atmel_start.h" //#include "winc_init.h" #ifndef CONF_WINC_EXT_INT_PIN #define CONF_WINC_EXT_INT_PIN 0 #endif static tpfNmBspIsr gpfIsr = NULL; void __ISR(_EXTERNAL_0_VECTOR , ipl3) chip_isr(void) //static void chip_isr(void) { if (gpfIsr) { gpfIsr(); } IFS0bits.INT0IF = 0; } /* * @fn nm_bsp_init * @brief Initialize BSP * @return 0 in case of success and -1 in case of failure */ sint8 nm_bsp_init(void) { gpfIsr = NULL; // //JFM Not necessary, we know our timer base is 1ms... // /* Make sure a 1ms Systick is configured. */ // if (!(SysTick->CTRL & SysTick_CTRL_ENABLE_Msk && SysTick->CTRL & SysTick_CTRL_TICKINT_Msk)) { // delay_init(SysTick); // } return M2M_SUCCESS; } /** * @fn nm_bsp_deinit * @brief De-iInitialize BSP * @return 0 in case of success and -1 in case of failure */ sint8 nm_bsp_deinit(void) { return M2M_SUCCESS; } /** * @fn nm_bsp_reset * @brief Reset NMC1500 SoC by setting CHIP_EN and RESET_N signals low, * CHIP_EN high then RESET_N high */ void nm_bsp_reset(void) { // GP_DEBUG_1_PIN = 1; WIFI_CHP_EN_PIN = 0; WIFI_CHP_RST_PIN = 0; // Sleep(1); //JFM Sleep(10); WIFI_CHP_EN_PIN = 1; // Sleep(5); JFM Sleep(15); WIFI_CHP_RST_PIN = 1; // GP_DEBUG_1_PIN = 0; // gpio_set_pin_level(CONF_WINC_PIN_CHIP_ENABLE, false); // gpio_set_pin_level(CONF_WINC_PIN_RESET, false); // nm_bsp_sleep(1); // gpio_set_pin_level(CONF_WINC_PIN_CHIP_ENABLE, true); // nm_bsp_sleep(5); // gpio_set_pin_level(CONF_WINC_PIN_RESET, true); } /* * @fn nm_bsp_sleep * @brief Sleep in units of mSec * @param[IN] u32TimeMsec * Time in milliseconds */ void nm_bsp_sleep(uint32 u32TimeMsec) { Sleep(u32TimeMsec); // while (u32TimeMsec--) { // delay_ms(1); // } } /** * \internal Get the PIO hardware instance * * \param[in] pin The PIO pin * * \return The instance of PIO hardware */ /* * @fn nm_bsp_register_isr * @brief Register interrupt service routine * @param[IN] pfIsr * Pointer to ISR handler */ void nm_bsp_register_isr(tpfNmBspIsr pfIsr) { gpfIsr = pfIsr; // // ext_irq_register(CONF_WINC_EXT_INT_PIN, chip_isr); } /* * @fn nm_bsp_interrupt_ctrl * @brief Enable/Disable interrupts * @param[IN] u8Enable * '0' disable interrupts. '1' enable interrupts */ void nm_bsp_interrupt_ctrl(uint8 u8Enable) { if(u8Enable == 0) { IEC0bits.INT0IE = 0; } else { IEC0bits.INT0IE = 1; } // _ext_irq_enable(CONF_WINC_EXT_INT_PIN, u8Enable); }