289 lines
7.5 KiB
C
289 lines
7.5 KiB
C
/**
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*
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* \file
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*
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* \brief This module contains NMC1000 bus APIs implementation.
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*
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* Copyright (c) 2015 - 2017 Atmel Corporation. All rights reserved.
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*
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* \asf_license_start
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*
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* \page License
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3. The name of Atmel may not be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
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* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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* \asf_license_stop
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*
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*/
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#ifndef CORTUS_APP
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#include "nmbus.h"
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#include "nmi2c.h"
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#include "nmspi.h"
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#include "nmuart.h"
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#define MAX_TRX_CFG_SZ 8
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/**
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* @fn nm_bus_iface_init
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* @brief Initialize bus interface
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* @return M2M_SUCCESS in case of success and M2M_ERR_BUS_FAIL in case of failure
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* @author M. Abdelmawla
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* @date 11 July 2012
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* @version 1.0
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*/
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sint8 nm_bus_iface_init(void *pvInitVal)
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{
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sint8 ret = M2M_SUCCESS;
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ret = nm_bus_init(pvInitVal);
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return ret;
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}
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/**
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* @fn nm_bus_iface_deinit
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* @brief Deinitialize bus interface
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* @return M2M_SUCCESS in case of success and M2M_ERR_BUS_FAIL in case of failure
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* @author Samer Sarhan
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* @date 07 April 2014
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* @version 1.0
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*/
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sint8 nm_bus_iface_deinit(void)
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{
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sint8 ret = M2M_SUCCESS;
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ret = nm_bus_deinit();
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return ret;
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}
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/**
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* @fn nm_bus_reset
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* @brief reset bus interface
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* @return M2M_SUCCESS in case of success and M2M_ERR_BUS_FAIL in case of failure
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* @version 1.0
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*/
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sint8 nm_bus_reset(void)
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{
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sint8 ret = M2M_SUCCESS;
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#ifdef CONF_WINC_USE_UART
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#elif defined(CONF_WINC_USE_SPI)
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return nm_spi_reset();
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#elif defined(CONF_WINC_USE_I2C)
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#else
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#error "Plesae define bus usage"
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#endif
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return ret;
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}
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/**
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* @fn nm_bus_iface_reconfigure
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* @brief reconfigure bus interface
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* @return M2M_SUCCESS in case of success and M2M_ERR_BUS_FAIL in case of failure
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* @author Viswanathan Murugesan
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* @date 22 Oct 2014
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* @version 1.0
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*/
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sint8 nm_bus_iface_reconfigure(void *ptr)
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{
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sint8 ret = M2M_SUCCESS;
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#ifdef CONF_WINC_USE_UART
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ret = nm_uart_reconfigure(ptr);
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#endif
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return ret;
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}
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/*
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* @fn nm_read_reg
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* @brief Read register
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* @param [in] u32Addr
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* Register address
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* @return Register value
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* @author M. Abdelmawla
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* @date 11 July 2012
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* @version 1.0
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*/
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uint32 nm_read_reg(uint32 u32Addr)
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{
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#ifdef CONF_WINC_USE_UART
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return nm_uart_read_reg(u32Addr);
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#elif defined(CONF_WINC_USE_SPI)
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return nm_spi_read_reg(u32Addr);
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#elif defined(CONF_WINC_USE_I2C)
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return nm_i2c_read_reg(u32Addr);
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#else
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#error "Plesae define bus usage"
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#endif
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}
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/*
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* @fn nm_read_reg_with_ret
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* @brief Read register with error code return
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* @param [in] u32Addr
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* Register address
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* @param [out] pu32RetVal
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* Pointer to u32 variable used to return the read value
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* @return M2M_SUCCESS in case of success and M2M_ERR_BUS_FAIL in case of failure
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* @author M. Abdelmawla
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* @date 11 July 2012
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* @version 1.0
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*/
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sint8 nm_read_reg_with_ret(uint32 u32Addr, uint32 *pu32RetVal)
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{
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#ifdef CONF_WINC_USE_UART
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return nm_uart_read_reg_with_ret(u32Addr, pu32RetVal);
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#elif defined(CONF_WINC_USE_SPI)
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return nm_spi_read_reg_with_ret(u32Addr, pu32RetVal);
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#elif defined(CONF_WINC_USE_I2C)
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return nm_i2c_read_reg_with_ret(u32Addr, pu32RetVal);
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#else
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#error "Plesae define bus usage"
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#endif
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}
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/*
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* @fn nm_write_reg
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* @brief write register
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* @param [in] u32Addr
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* Register address
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* @param [in] u32Val
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* Value to be written to the register
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* @return M2M_SUCCESS in case of success and M2M_ERR_BUS_FAIL in case of failure
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* @author M. Abdelmawla
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* @date 11 July 2012
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* @version 1.0
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*/
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sint8 nm_write_reg(uint32 u32Addr, uint32 u32Val)
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{
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#ifdef CONF_WINC_USE_UART
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return nm_uart_write_reg(u32Addr, u32Val);
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#elif defined(CONF_WINC_USE_SPI)
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return nm_spi_write_reg(u32Addr, u32Val);
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#elif defined(CONF_WINC_USE_I2C)
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return nm_i2c_write_reg(u32Addr, u32Val);
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#else
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#error "Plesae define bus usage"
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#endif
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}
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static sint8 p_nm_read_block(uint32 u32Addr, uint8 *puBuf, uint16 u16Sz)
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{
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#ifdef CONF_WINC_USE_UART
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return nm_uart_read_block(u32Addr, puBuf, u16Sz);
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#elif defined(CONF_WINC_USE_SPI)
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return nm_spi_read_block(u32Addr, puBuf, u16Sz);
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#elif defined(CONF_WINC_USE_I2C)
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return nm_i2c_read_block(u32Addr, puBuf, u16Sz);
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#else
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#error "Plesae define bus usage"
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#endif
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}
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/*
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* @fn nm_read_block
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* @brief Read block of data
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* @param [in] u32Addr
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* Start address
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* @param [out] puBuf
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* Pointer to a buffer used to return the read data
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* @param [in] u32Sz
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* Number of bytes to read. The buffer size must be >= u32Sz
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* @return M2M_SUCCESS in case of success and M2M_ERR_BUS_FAIL in case of failure
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* @author M. Abdelmawla
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* @date 11 July 2012
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* @version 1.0
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*/
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sint8 nm_read_block(uint32 u32Addr, uint8 *puBuf, uint32 u32Sz)
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{
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uint16 u16MaxTrxSz = egstrNmBusCapabilities.u16MaxTrxSz - MAX_TRX_CFG_SZ;
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uint32 off = 0;
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sint8 s8Ret = M2M_SUCCESS;
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for (;;) {
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if (u32Sz <= u16MaxTrxSz) {
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s8Ret += p_nm_read_block(u32Addr, &puBuf[off], (uint16)u32Sz);
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break;
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} else {
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s8Ret += p_nm_read_block(u32Addr, &puBuf[off], u16MaxTrxSz);
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if (M2M_SUCCESS != s8Ret)
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break;
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u32Sz -= u16MaxTrxSz;
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off += u16MaxTrxSz;
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u32Addr += u16MaxTrxSz;
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}
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}
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return s8Ret;
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}
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static sint8 p_nm_write_block(uint32 u32Addr, uint8 *puBuf, uint16 u16Sz)
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{
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#ifdef CONF_WINC_USE_UART
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return nm_uart_write_block(u32Addr, puBuf, u16Sz);
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#elif defined(CONF_WINC_USE_SPI)
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return nm_spi_write_block(u32Addr, puBuf, u16Sz);
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#elif defined(CONF_WINC_USE_I2C)
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return nm_i2c_write_block(u32Addr, puBuf, u16Sz);
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#else
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#error "Plesae define bus usage"
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#endif
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}
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/**
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* @fn nm_write_block
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* @brief Write block of data
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* @param [in] u32Addr
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* Start address
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* @param [in] puBuf
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* Pointer to the buffer holding the data to be written
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* @param [in] u32Sz
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* Number of bytes to write. The buffer size must be >= u32Sz
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* @return M2M_SUCCESS in case of success and M2M_ERR_BUS_FAIL in case of failure
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* @author M. Abdelmawla
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* @date 11 July 2012
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* @version 1.0
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*/
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sint8 nm_write_block(uint32 u32Addr, uint8 *puBuf, uint32 u32Sz)
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{
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uint16 u16MaxTrxSz = egstrNmBusCapabilities.u16MaxTrxSz - MAX_TRX_CFG_SZ;
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uint32 off = 0;
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sint8 s8Ret = M2M_SUCCESS;
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for (;;) {
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if (u32Sz <= u16MaxTrxSz) {
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s8Ret += p_nm_write_block(u32Addr, &puBuf[off], (uint16)u32Sz);
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break;
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} else {
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s8Ret += p_nm_write_block(u32Addr, &puBuf[off], u16MaxTrxSz);
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if (M2M_SUCCESS != s8Ret)
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break;
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u32Sz -= u16MaxTrxSz;
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off += u16MaxTrxSz;
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u32Addr += u16MaxTrxSz;
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}
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}
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return s8Ret;
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}
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#endif
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