174 lines
5.8 KiB
C
174 lines
5.8 KiB
C
/**
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*
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* \file
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*
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* \brief This module contains NMC1000 bus wrapper APIs declarations.
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*
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* Copyright (c) 2015 - 2017 Atmel Corporation. All rights reserved.
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*
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* \asf_license_start
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*
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* \page License
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3. The name of Atmel may not be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
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* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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* \asf_license_stop
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*
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*/
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#ifndef _NM_BUS_WRAPPER_H_
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#define _NM_BUS_WRAPPER_H_
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#include "common/include/nm_common.h"
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/**
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BUS Type
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**/
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#define NM_BUS_TYPE_I2C ((uint8)0)
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#define NM_BUS_TYPE_SPI ((uint8)1)
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#define NM_BUS_TYPE_UART ((uint8)2)
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/**
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IOCTL commands
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**/
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#define NM_BUS_IOCTL_R ((uint8)0) /*!< Read only ==> I2C/UART. Parameter:tstrNmI2cDefault/tstrNmUartDefault */
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#define NM_BUS_IOCTL_W ((uint8)1) /*!< Write only ==> I2C/UART. Parameter type tstrNmI2cDefault/tstrNmUartDefault*/
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#define NM_BUS_IOCTL_W_SPECIAL \
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((uint8)2) /*!< Write two buffers within the same transaction \
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(same start/stop conditions) ==> I2C only. Parameter:tstrNmI2cSpecial */
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#define NM_BUS_IOCTL_RW ((uint8)3) /*!< Read/Write at the same time ==> SPI only. Parameter:tstrNmSpiRw */
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#define NM_BUS_IOCTL_WR_RESTART \
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((uint8)4) /*!< Write buffer then made restart condition then read ==> I2C only. parameter:tstrNmI2cSpecial */
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/**
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* @struct tstrNmBusCapabilities
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* @brief Structure holding bus capabilities information
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* @sa NM_BUS_TYPE_I2C, NM_BUS_TYPE_SPI
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*/
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typedef struct {
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uint16 u16MaxTrxSz; /*!< Maximum transfer size. Must be >= 16 bytes*/
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} tstrNmBusCapabilities;
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/**
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* @struct tstrNmI2cDefault
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* @brief Structure holding I2C default operation parameters
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* @sa NM_BUS_IOCTL_R, NM_BUS_IOCTL_W
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*/
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typedef struct {
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uint8 u8SlaveAdr;
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uint8 *pu8Buf; /*!< Operation buffer */
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uint16 u16Sz; /*!< Operation size */
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} tstrNmI2cDefault;
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/**
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* @struct tstrNmI2cSpecial
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* @brief Structure holding I2C special operation parameters
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* @sa NM_BUS_IOCTL_W_SPECIAL
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*/
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typedef struct {
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uint8 u8SlaveAdr;
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uint8 *pu8Buf1; /*!< pointer to the 1st buffer */
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uint8 *pu8Buf2; /*!< pointer to the 2nd buffer */
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uint16 u16Sz1; /*!< 1st buffer size */
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uint16 u16Sz2; /*!< 2nd buffer size */
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} tstrNmI2cSpecial;
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/**
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* @struct tstrNmSpiRw
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* @brief Structure holding SPI R/W parameters
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* @sa NM_BUS_IOCTL_RW
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*/
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typedef struct {
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uint8 *pu8InBuf; /*!< pointer to input buffer.
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Can be set to null and in this case zeros should be sent at MOSI */
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uint8 *pu8OutBuf; /*!< pointer to output buffer.
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Can be set to null and in this case data from MISO can be ignored */
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uint16 u16Sz; /*!< Transfere size */
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} tstrNmSpiRw;
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/**
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* @struct tstrNmUartDefault
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* @brief Structure holding UART default operation parameters
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* @sa NM_BUS_IOCTL_R, NM_BUS_IOCTL_W
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*/
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typedef struct {
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uint8 *pu8Buf; /*!< Operation buffer */
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uint16 u16Sz; /*!< Operation size */
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} tstrNmUartDefault;
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/*!< Bus capabilities. This structure must be declared at platform specific bus wrapper */
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extern tstrNmBusCapabilities egstrNmBusCapabilities;
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @fn nm_bus_init
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* @brief Initialize the bus wrapper
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* @return ZERO in case of success and M2M_ERR_BUS_FAIL in case of failure
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*/
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sint8 nm_bus_init(void *);
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/**
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* @fn nm_bus_ioctl
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* @brief send/receive from the bus
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* @param [in] u8Cmd
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* IOCTL command for the operation
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* @param [in] pvParameter
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* Arbitrary parameter depending on IOCTL
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* @return ZERO in case of success and M2M_ERR_BUS_FAIL in case of failure
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* @note For SPI only, it's important to be able to send/receive at the same time
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*/
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sint8 nm_bus_ioctl(uint8 u8Cmd, void *pvParameter);
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/**
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* @fn nm_bus_deinit
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* @brief De-initialize the bus wrapper
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* @return ZERO in case of success and M2M_ERR_BUS_FAIL in case of failure
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*/
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sint8 nm_bus_deinit(void);
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/*
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* @fn nm_bus_reinit
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* @brief re-initialize the bus wrapper
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* @param [in] void *config
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* re-init configuration data
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* @return ZERO in case of success and M2M_ERR_BUS_FAIL in case of failure
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*/
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sint8 nm_bus_reinit(void *);
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/*
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* @fn nm_bus_get_chip_type
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* @brief get chip type
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* @return ZERO in case of success and M2M_ERR_BUS_FAIL in case of failure
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*/
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#ifdef CONF_WINC_USE_UART
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uint8 nm_bus_get_chip_type(void);
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sint8 nm_bus_break(void);
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#endif
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#ifdef __cplusplus
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}
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#endif
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#endif /*_NM_BUS_WRAPPER_H_*/
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